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[doc] Update documentation of AArch64 options

Message ID AM3PR08MB0088B1A2AA2979BC80CD6320836E0@AM3PR08MB0088.eurprd08.prod.outlook.com
State New
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Commit Message

Wilco Dijkstra April 21, 2016, 4:26 p.m. UTC
Update documentation of AArch64 options for GCC6 to be more accurate, 
fix a few minor mistakes and remove some duplication.

Tested with "make info dvi pdf html" and checked resulting PDF is as expected.

OK for trunk and backport to GCC6.1 branch?

ChangeLog:
2016-04-21  Wilco Dijkstra  <wdijkstr@arm.com>

gcc/
	* gcc/doc/invoke.texi (AArch64 Options): Update.


--

Comments

Sandra Loosemore April 21, 2016, 6:35 p.m. UTC | #1
On 04/21/2016 10:26 AM, Wilco Dijkstra wrote:

> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index e9763d44d8d7aa6a64821a4b1811e55025aaaa4e..ddd4eeaec1502f871d0febd6045e37153c48a7e1 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -12827,9 +12827,9 @@ These options are defined for AArch64 implementations:
>   @item -mabi=@var{name}
>   @opindex mabi
>   Generate code for the specified data model.  Permissible values
> -are @samp{ilp32} for SysV-like data model where int, long int and pointer
> +are @samp{ilp32} for SysV-like data model where int, long int and pointers
>   are 32-bit, and @samp{lp64} for SysV-like data model where int is 32-bit,
> -but long int and pointer are 64-bit.
> +but long int and pointers are 64-bit.

Can you please change all the incorrectly hyphenated "32-bit" and 
"64-bit" uses in this section to "32 bits" and "64 bits" respectively? 
("n-bit" should only be hyphenated when it is used as an adjective 
phrase immediately before the noun it modifies.)

> @@ -12872,7 +12871,8 @@ statically linked only.
>
>   @item -mstrict-align
>   @opindex mstrict-align
> -Do not assume that unaligned memory references are handled by the system.
> +Avoid generating unaligned accesses when accessing objects at non-naturally
> +aligned boundaries as described in the architecture.

The new text seems repetitive and awkward to me.  How about something like:

Avoid generating memory accesses that may not be aligned on a natural 
object boundary as described in the architecture specification.

??

> @@ -12916,10 +12916,11 @@ corresponding flag to the linker.
>   @item -mno-low-precision-recip-sqrt
>   @opindex -mlow-precision-recip-sqrt
>   @opindex -mno-low-precision-recip-sqrt
> -When calculating the reciprocal square root approximation,
> -uses one less step than otherwise, thus reducing latency and precision.
> -This is only relevant if @option{-ffast-math} enables the reciprocal square root
> -approximation, which in turn depends on the target processor.
> +Enable or disable reciprocal square root approximation.
> +This option only has an effect if @option{-ffast-math} or
> +@option{-funsafe-math-optimizations} is used as well.  Enabling this reduces
> +precision of reciprocal square root results to about 16 bits for
> +single-precision and to 32 bits for double-precision.

"single precision" and "double precision" should not be hyphenated when 
used as nouns, as they are here (only when used as an adjective phrase 
immediately before the noun they modify).

> @@ -13010,10 +13003,10 @@ This option is only intended to be useful when developing GCC.
>
>   @item -mpc-relative-literal-loads
>   @opindex mpcrelativeliteralloads

What happened to that @opindex entry?  :-(

> -Enable PC relative literal loads. If this option is used, literal
> -pools are assumed to have a range of up to 1MiB and an appropriate
> -instruction sequence is used. This option has no impact when used
> -with @option{-mcmodel=tiny}.
> +Enable PC relative literal loads.  With this option literal pools are

"PC-relative" should be hyphenated since this *is* and adjective phrase 
immediately before the noun it modifies....

-Sandra the nit-picky
diff mbox

Patch

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e9763d44d8d7aa6a64821a4b1811e55025aaaa4e..ddd4eeaec1502f871d0febd6045e37153c48a7e1 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12827,9 +12827,9 @@  These options are defined for AArch64 implementations:
 @item -mabi=@var{name}
 @opindex mabi
 Generate code for the specified data model.  Permissible values
-are @samp{ilp32} for SysV-like data model where int, long int and pointer
+are @samp{ilp32} for SysV-like data model where int, long int and pointers
 are 32-bit, and @samp{lp64} for SysV-like data model where int is 32-bit,
-but long int and pointer are 64-bit.
+but long int and pointers are 64-bit.
 
 The default depends on the specific target configuration.  Note that
 the LP64 and ILP32 ABIs are not link-compatible; you must compile your
@@ -12854,9 +12854,8 @@  Generate little-endian code.  This is the default when GCC is configured for an
 @item -mcmodel=tiny
 @opindex mcmodel=tiny
 Generate code for the tiny code model.  The program and its statically defined
-symbols must be within 1GB of each other.  Pointers are 64 bits.  Programs can
-be statically or dynamically linked.  This model is not fully implemented and
-mostly treated as @samp{small}.
+symbols must be within 1MB of each other.  Pointers are 64 bits.  Programs can
+be statically or dynamically linked.
 
 @item -mcmodel=small
 @opindex mcmodel=small
@@ -12872,7 +12871,8 @@  statically linked only.
 
 @item -mstrict-align
 @opindex mstrict-align
-Do not assume that unaligned memory references are handled by the system.
+Avoid generating unaligned accesses when accessing objects at non-naturally
+aligned boundaries as described in the architecture.
 
 @item -momit-leaf-frame-pointer
 @itemx -mno-omit-leaf-frame-pointer
@@ -12894,7 +12894,7 @@  of TLS variables.
 @item -mtls-size=@var{size}
 @opindex mtls-size
 Specify bit size of immediate TLS offsets.  Valid values are 12, 24, 32, 48.
-This option depends on binutils higher than 2.25.
+This option requires binutils 2.26 or newer.
 
 @item -mfix-cortex-a53-835769
 @itemx -mno-fix-cortex-a53-835769
@@ -12916,10 +12916,11 @@  corresponding flag to the linker.
 @item -mno-low-precision-recip-sqrt
 @opindex -mlow-precision-recip-sqrt
 @opindex -mno-low-precision-recip-sqrt
-When calculating the reciprocal square root approximation,
-uses one less step than otherwise, thus reducing latency and precision.
-This is only relevant if @option{-ffast-math} enables the reciprocal square root
-approximation, which in turn depends on the target processor.
+Enable or disable reciprocal square root approximation.
+This option only has an effect if @option{-ffast-math} or
+@option{-funsafe-math-optimizations} is used as well.  Enabling this reduces
+precision of reciprocal square root results to about 16 bits for
+single-precision and to 32 bits for double-precision.
 
 @item -march=@var{name}
 @opindex march
@@ -12956,17 +12957,15 @@  Specify the name of the target processor for which GCC should tune the
 performance of the code.  Permissible values for this option are:
 @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
 @samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx},
-@samp{xgene1}.
+@samp{xgene1}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
+@samp{native}.
 
-Additionally, this option can specify that GCC should tune the performance
-of the code for a big.LITTLE system.  Permissible values for this
-option are: @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}.
+The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}
+specify that GCC should tune for a big.LITTLE system.
 
 Additionally on native AArch64 GNU/Linux systems the value
-@samp{native} is available.  This option causes the compiler to pick
-the architecture of and tune the performance of the code for the
-processor of the host system.  This option has no effect if the
-compiler is unable to recognize the architecture of the host system.
+@samp{native} tunes performance to the host system.  This option has no effect
+if the compiler is unable to recognize the processor of the host system.
 
 Where none of @option{-mtune=}, @option{-mcpu=} or @option{-march=}
 are specified, the code is tuned to perform well across a range
@@ -12986,12 +12985,6 @@  documented in the sub-section on
 Feature Modifiers}.  Where conflicting feature modifiers are
 specified, the right-most feature is used.
 
-Additionally on native AArch64 GNU/Linux systems the value
-@samp{native} is available.  This option causes the compiler to tune
-the performance of the code for the processor of the host system.
-This option has no effect if the compiler is unable to recognize the
-architecture of the host system.
-
 GCC uses @var{name} to determine what kind of instructions it can emit when
 generating assembly code (as if by @option{-march}) and to determine
 the target processor for which to tune for performance (as if
@@ -13010,10 +13003,10 @@  This option is only intended to be useful when developing GCC.
 
 @item -mpc-relative-literal-loads
 @opindex mpcrelativeliteralloads
-Enable PC relative literal loads. If this option is used, literal
-pools are assumed to have a range of up to 1MiB and an appropriate
-instruction sequence is used. This option has no impact when used
-with @option{-mcmodel=tiny}.
+Enable PC relative literal loads.  With this option literal pools are
+accessed using a single instruction and emitted after each function.  This
+limits the maximum size of functions to 1MB.  This is enabled by default for
+@option{-mcmodel=tiny}.
 
 @end table
 
@@ -13044,9 +13037,9 @@  Enable Large System Extension instructions.  This is on by default for
 
 @end table
 
-That is, @option{crypto} implies @option{simd} implies @option{fp}.
-Conversely, @option{nofp} (or equivalently, @option{-mgeneral-regs-only})
-implies @option{nosimd} implies @option{nocrypto}.
+Feature @option{crypto} implies @option{simd}, which implies @option{fp}.
+Conversely, @option{nofp} implies @option{nosimd}, which implies
+@option{nocrypto}.
 
 @node Adapteva Epiphany Options
 @subsection Adapteva Epiphany Options