[v3,02/13] intel_iommu: set IR bit for ECAP register

Enable IR in IOMMU Extended Capability register.

Signed-off-by: Peter Xu <peterx@redhat.com>
---
 hw/i386/intel_iommu.c          | 7 +++++++
 hw/i386/intel_iommu_internal.h | 2 ++
 2 files changed, 9 insertions(+)

On 2016-04-14 20:31, Peter Xu wrote:
> Enable IR in IOMMU Extended Capability register.
> 
> Signed-off-by: Peter Xu <peterx@redhat.com>
> ---
>  hw/i386/intel_iommu.c          | 7 +++++++
>  hw/i386/intel_iommu_internal.h | 2 ++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 4b0558e..17668d6 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -24,6 +24,7 @@
>  #include "exec/address-spaces.h"
>  #include "intel_iommu_internal.h"
>  #include "hw/pci/pci.h"
> +#include "hw/boards.h"
>  
>  /*#define DEBUG_INTEL_IOMMU*/
>  #ifdef DEBUG_INTEL_IOMMU
> @@ -1941,6 +1942,8 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
>   */
>  static void vtd_init(IntelIOMMUState *s)
>  {
> +    MachineState *ms = MACHINE(qdev_get_machine());
> +
>      memset(s->csr, 0, DMAR_REG_SIZE);
>      memset(s->wmask, 0, DMAR_REG_SIZE);
>      memset(s->w1cmask, 0, DMAR_REG_SIZE);
> @@ -1961,6 +1964,10 @@ static void vtd_init(IntelIOMMUState *s)
>               VTD_CAP_SAGAW | VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SLLPS;
>      s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;
>  
> +    if (ms->iommu_intr) {

This cannot work, the field doesn't exit yet.

Please test bisectability after reordering patches.

Jan

> +        s->ecap |= VTD_ECAP_IR;
> +    }
> +
>      vtd_reset_context_cache(s);
>      vtd_reset_iotlb(s);
>  
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index b648e69..5b98a11 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -176,6 +176,8 @@
>  /* (offset >> 4) << 8 */
>  #define VTD_ECAP_IRO                (DMAR_IOTLB_REG_OFFSET << 4)
>  #define VTD_ECAP_QI                 (1ULL << 1)
> +/* Interrupt Remapping support */
> +#define VTD_ECAP_IR                 (1ULL << 3)
>  
>  /* CAP_REG */
>  /* (offset >> 4) << 24 */
>

On Sat, Apr 16, 2016 at 07:30:25PM -0700, Jan Kiszka wrote:
> On 2016-04-14 20:31, Peter Xu wrote:
> > Enable IR in IOMMU Extended Capability register.
> > 
> > Signed-off-by: Peter Xu <peterx@redhat.com>
> > ---
> >  hw/i386/intel_iommu.c          | 7 +++++++
> >  hw/i386/intel_iommu_internal.h | 2 ++
> >  2 files changed, 9 insertions(+)
> > 
> > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> > index 4b0558e..17668d6 100644
> > --- a/hw/i386/intel_iommu.c
> > +++ b/hw/i386/intel_iommu.c
> > @@ -24,6 +24,7 @@
> >  #include "exec/address-spaces.h"
> >  #include "intel_iommu_internal.h"
> >  #include "hw/pci/pci.h"
> > +#include "hw/boards.h"
> >  
> >  /*#define DEBUG_INTEL_IOMMU*/
> >  #ifdef DEBUG_INTEL_IOMMU
> > @@ -1941,6 +1942,8 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
> >   */
> >  static void vtd_init(IntelIOMMUState *s)
> >  {
> > +    MachineState *ms = MACHINE(qdev_get_machine());
> > +
> >      memset(s->csr, 0, DMAR_REG_SIZE);
> >      memset(s->wmask, 0, DMAR_REG_SIZE);
> >      memset(s->w1cmask, 0, DMAR_REG_SIZE);
> > @@ -1961,6 +1964,10 @@ static void vtd_init(IntelIOMMUState *s)
> >               VTD_CAP_SAGAW | VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SLLPS;
> >      s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;
> >  
> > +    if (ms->iommu_intr) {
> 
> This cannot work, the field doesn't exit yet.
> 
> Please test bisectability after reordering patches.

Oh god, I missed one patch. There should be 14 patches, while it
seems that I generated only 13. :(

Sorry for the misunderstanding. Will repost as v4.

-- peterx