| Message ID | 1460544768-32750-2-git-send-email-vigneshr@ti.com |
|---|---|
| State | Accepted |
| Commit | dac3bf20fb2c9b03476be0d73db620f62ab3cee1 |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On 04/13/2016 12:52 PM, Vignesh R wrote: > AHB address can be as long as 32 bit, hence remove the > CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT > and read as u32 value, it anyway does not make sense to mask upper bits. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > drivers/spi/cadence_qspi_apb.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) Oops, I didn't realize this was for U-Boot. On SoCFPGA SoCkit: Tested-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Best regards, Marek Vasut
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 7786dd65f509..a31b43b0114d 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -44,7 +44,6 @@ #define CQSPI_INST_TYPE_QUAD (2) #define CQSPI_STIG_DATA_LEN_MAX (8) -#define CQSPI_INDIRECTTRIGGER_ADDR_MASK (0xFFFFF) #define CQSPI_DUMMY_CLKS_PER_BYTE (8) #define CQSPI_DUMMY_BYTES_MAX (4) @@ -694,7 +693,7 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat, addr_bytes = cmdlen - 1; /* Setup the indirect trigger address */ - writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK), + writel((u32)plat->ahbbase, plat->regbase + CQSPI_REG_INDIRECTTRIGGER); /* Configure the opcode */ @@ -791,7 +790,7 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, return -EINVAL; } /* Setup the indirect trigger address */ - writel(((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK), + writel((u32)plat->ahbbase, plat->regbase + CQSPI_REG_INDIRECTTRIGGER); /* Configure the opcode */
AHB address can be as long as 32 bit, hence remove the CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT and read as u32 value, it anyway does not make sense to mask upper bits. Signed-off-by: Vignesh R <vigneshr@ti.com> --- drivers/spi/cadence_qspi_apb.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)