From patchwork Sun Apr 10 21:23:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Ricard X-Patchwork-Id: 608580 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qjmQd24ZXz9t3l for ; Mon, 11 Apr 2016 07:23:37 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=sfs-ml-2.v29.ch3.sourceforge.com) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1apMpP-0003a9-N6; Sun, 10 Apr 2016 21:23:31 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1apMpN-0003a4-QP for tpmdd-devel@lists.sourceforge.net; Sun, 10 Apr 2016 21:23:29 +0000 Received-SPF: pass (sog-mx-4.v43.ch3.sourceforge.com: domain of gmail.com designates 74.125.82.52 as permitted sender) client-ip=74.125.82.52; envelope-from=christophe.ricard@gmail.com; helo=mail-wm0-f52.google.com; Received: from mail-wm0-f52.google.com ([74.125.82.52]) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:RC4-SHA:128) (Exim 4.76) id 1apMpN-0003UZ-07 for tpmdd-devel@lists.sourceforge.net; Sun, 10 Apr 2016 21:23:29 +0000 Received: by mail-wm0-f52.google.com with SMTP id u206so81091952wme.1 for ; Sun, 10 Apr 2016 14:23:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UeKgM7E+M5qgbKT+Xf5WMoXCK2UJ4WsYqkkkazc8Mck=; b=T6T6w+7YzJAtAuMu98U3RuFOQfSxqbiJR1seB/tSG05XFzKqNrRFNc7lHjw8jJ4KFF G1UvEWRwQ9RcqN97B8fWOPXNOjwHo8/sWufL/uqQyqXMRTk5yF4Q0YLJBZnoEGO/oCut aEdHLufbPlrj/ihZE98YJQbBe6jQZmcp2B2URdKB6qGuaCJh4mOIBG7pOLIUTYrd2qIG VAvfkn4sEegaWdR7cB3Hxw3yfPdyN83PTIhNqeQ3g8pKdhlPg1VR+t9U/ydMcZAltEN1 0d0XXdJToslkIXfyDimHwtv35fwuXh0cTp+WSj41KxDSstDFQR//CqamHG34uxHoZQcP zagA== X-Gm-Message-State: AD7BkJLtqtKTGDVF97DMfVZkqzfmZfk28Uwte9EXldjyq3YnBk646eKuAtoyhAXfz2lQmQ== X-Received: by 10.194.95.198 with SMTP id dm6mr21583958wjb.136.1460323402989; Sun, 10 Apr 2016 14:23:22 -0700 (PDT) Received: from localhost.localdomain (ax113-6-78-236-204-66.fbx.proxad.net. [78.236.204.66]) by smtp.gmail.com with ESMTPSA id kj9sm24537597wjb.14.2016.04.10.14.23.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 10 Apr 2016 14:23:22 -0700 (PDT) From: Christophe Ricard X-Google-Original-From: Christophe Ricard To: jarkko.sakkinen@linux.intel.com Date: Sun, 10 Apr 2016 23:23:00 +0200 Message-Id: <1460323386-16892-5-git-send-email-christophe-h.ricard@st.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1460323386-16892-1-git-send-email-christophe-h.ricard@st.com> References: <1460323386-16892-1-git-send-email-christophe-h.ricard@st.com> X-Spam-Score: -1.6 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (christophe.ricard[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-Headers-End: 1apMpN-0003UZ-07 Cc: jean-luc.blanc@st.com, ashley@ashleylai.com, tpmdd-devel@lists.sourceforge.net, christophe-h.ricard@st.com, benoit.houyere@st.com Subject: [tpmdd-devel] [PATCH 04/10] tpm: Manage itpm workaround with tis specific data_expect bit X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: tpmdd-devel-bounces@lists.sourceforge.net In order to keep this itpm workaround available after the tpm_tis rework, we are changing the way it is managed by using a tpm_tis_phy_ops structure allowing to manage TPM_STS_EXPECT_DATA bit behavior according to different TPM vendor. Those 2 fields might be used only for tpm_tis (lpc) phy in the future. Signed-off-by: Christophe Ricard --- drivers/char/tpm/tpm_tis.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c index ee5851e..5b3eb26 100644 --- a/drivers/char/tpm/tpm_tis.c +++ b/drivers/char/tpm/tpm_tis.c @@ -93,6 +93,11 @@ struct tpm_info { #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) #define TPM_RID(l) (0x0F04 | ((l) << 12)) +struct tpm_tis_phy_ops { + u8 data_expect_mask; + u8 data_expect_val; +}; + struct priv_data { void __iomem *iobase; u16 manufacturer_id; @@ -101,6 +106,7 @@ struct priv_data { bool irq_tested; wait_queue_head_t int_queue; wait_queue_head_t read_queue; + struct tpm_tis_phy_ops *phy_ops; }; #if defined(CONFIG_PNP) && defined(CONFIG_ACPI) @@ -381,7 +387,8 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, &priv->int_queue, false); status = tpm_tis_status(chip); - if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { + if ((status & priv->phy_ops->data_expect_mask) != + priv->phy_ops->data_expect_val) { rc = -EIO; goto out_err; } @@ -395,7 +402,8 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, &priv->int_queue, false); status = tpm_tis_status(chip); - if ((status & TPM_STS_DATA_EXPECT) != 0) { + if ((status & priv->phy_ops->data_expect_mask) == + priv->phy_ops->data_expect_mask) { rc = -EIO; goto out_err; } @@ -532,6 +540,8 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip, static int probe_itpm(struct tpm_chip *chip) { struct priv_data *priv = dev_get_drvdata(&chip->dev); + u8 data_expect_mask = priv->phy_ops->data_expect_mask; + u8 data_expect_val = priv->phy_ops->data_expect_val; int rc = 0; u8 cmd_getticks[] = { 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, @@ -559,13 +569,18 @@ static int probe_itpm(struct tpm_chip *chip) release_locality(chip, priv->locality, 0); itpm = true; + priv->phy_ops->data_expect_mask = 0; + priv->phy_ops->data_expect_val = 0; rc = tpm_tis_send_data(chip, cmd_getticks, len); if (rc == 0) { dev_info(&chip->dev, "Detected an iTPM.\n"); rc = 1; - } else + } else { + priv->phy_ops->data_expect_mask = data_expect_mask; + priv->phy_ops->data_expect_val = data_expect_val; rc = -EFAULT; + } out: itpm = rem_itpm; @@ -601,6 +616,11 @@ static const struct tpm_class_ops tpm_tis = { .req_canceled = tpm_tis_req_canceled, }; +static struct tpm_tis_phy_ops tis_phy_ops = { + .data_expect_mask = TPM_STS_DATA_EXPECT, + .data_expect_val = TPM_STS_DATA_EXPECT, +}; + static int tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len, u8 *result) { @@ -844,6 +864,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info, chip->timeout_b = TIS_TIMEOUT_B_MAX; chip->timeout_c = TIS_TIMEOUT_C_MAX; chip->timeout_d = TIS_TIMEOUT_D_MAX; + priv->phy_ops = &tis_phy_ops; dev_set_drvdata(&chip->dev, priv);