diff mbox

[U-Boot,v2,00/11] ARMv7: PSCI: add PSCI v1.0 support

Message ID CABxX_wOH3nPM-Gx1VQqEhBxVdfp=1AoXAHciyOvJOD+ASEstCQ@mail.gmail.com
State Superseded
Delegated to: Albert ARIBAUD
Headers show

Commit Message

macro.wave.z@gmail.com April 8, 2016, 7:57 a.m. UTC
This patch set touches other psci drivers, such as

 arch/arm/cpu/armv7/mx7/psci.S              |   7 +-
 arch/arm/cpu/armv7/sunxi/psci_sun6i.S      |   8 +-
 arch/arm/cpu/armv7/sunxi/psci_sun7i.S      |   8 +-
 arch/arm/mach-tegra/psci.S                 |   7 +-

But the changes are quite slightly, take the psci_sun7i.S for example,
changes after all patches are like this:


On Fri, Apr 8, 2016 at 2:23 PM,  <macro.wave.z@gmail.com> wrote:
> From: Hongbo Zhang <hongbo.zhang@nxp.com>
>
> This patch set contains two parts:
> ARMv7 PSCI common framework: fix some issues and add v1.0 support
> NXP (was Freescale) LS102XA: codes enhancement and add v1.0 implementation
>
> Changes since v1:
> - re-organize psci_cpu_on_common, this code should be called by each platform's
> psci_cpu_on, should not be a function calling each psci_cpu_on, all related
> functions are updated due to this change
> - update some registers usage, e.g. if r10 is used without push/pop, u-boot
> cannot launch rt-kernel
> - update some comments to be clearer, re-organize all patches for easier review
> - add patch to check already_on or on_pending for LS102XA
>
>
> Hongbo Zhang:
> Wang Dongsheng:
>   ARMv7: PSCI: update function psci_get_cpu_stack_top
>   ARMv7: PSCI: update the place of saving target PC
>   ARMv7: PSCI: add codes to save context ID for CPU_ON
>   ARMv7: PSCI: factor out reusable psci_cpu_on_common
>   ARMv7: PSCI: add PSCI v1.0 functions skeleton
>   ARMv7: PSCI: ls102xa: check target CPU ID before further operations
>   ARMv7: PSCI: ls102xa: check ALREADY_ON or ON_PENDING for CPU_ON
>   ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention
>   ARMv7: PSCI: ls102xa: move secure text section into OCRAM
>   ARM: PSCI: change PSCI function IDs base and offsets
>   ARM: PSCI: change PSCI related macros definition style
>
>  arch/arm/cpu/armv7/ls102xa/psci.S          | 177 +++++++++++++++++++++++++++--
>  arch/arm/cpu/armv7/mx7/psci.S              |   7 +-
>  arch/arm/cpu/armv7/nonsec_virt.S           |   7 ++
>  arch/arm/cpu/armv7/psci.S                  | 113 +++++++++++++++---
>  arch/arm/cpu/armv7/sunxi/psci_sun6i.S      |   8 +-
>  arch/arm/cpu/armv7/sunxi/psci_sun7i.S      |   8 +-
>  arch/arm/cpu/armv7/virt-dt.c               |  54 ++++++---
>  arch/arm/include/asm/arch-ls102xa/config.h |   3 +-
>  arch/arm/include/asm/psci.h                |  62 +++++++---
>  arch/arm/mach-tegra/psci.S                 |   7 +-
>  board/freescale/ls1021aqds/Makefile        |   1 +
>  board/freescale/ls1021aqds/psci.S          |  36 ++++++
>  board/freescale/ls1021atwr/Makefile        |   1 +
>  board/freescale/ls1021atwr/psci.S          |  28 +++++
>  include/configs/ls1021aqds.h               |   3 +
>  include/configs/ls1021atwr.h               |   3 +
>  16 files changed, 449 insertions(+), 69 deletions(-)
>  create mode 100644 board/freescale/ls1021aqds/psci.S
>  create mode 100644 board/freescale/ls1021atwr/psci.S
>
> --
> 2.1.4
>

Comments

macro.wave.z@gmail.com April 8, 2016, 8:17 a.m. UTC | #1
Hi all,
Purpose of my previous reply was to explain that other platform's psci
codes are touched several times in my patches, but they are not
changed much at last, while that reply was identified by patch work as
a patch too, reviews please ignore it:

https://patchwork.ozlabs.org/patch/607904/

On Fri, Apr 8, 2016 at 3:57 PM, hb zhang <macro.wave.z@gmail.com> wrote:
> This patch set touches other psci drivers, such as
>
>  arch/arm/cpu/armv7/mx7/psci.S              |   7 +-
>  arch/arm/cpu/armv7/sunxi/psci_sun6i.S      |   8 +-
>  arch/arm/cpu/armv7/sunxi/psci_sun7i.S      |   8 +-
>  arch/arm/mach-tegra/psci.S                 |   7 +-
>
> But the changes are quite slightly, take the psci_sun7i.S for example,
> changes after all patches are like this:
>
> diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
> b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
> index e15d587..b0601a7 100644
> --- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
> +++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
> @@ -119,14 +119,12 @@ out:      mcr     p15, 0, r7, c1, c1, 0
>
>         @ r1 = target CPU
>         @ r2 = target PC
> +       @ r3 = target Conetxt ID
>  .globl psci_cpu_on
>  psci_cpu_on:
>         push    {lr}
>
> -       mov     r0, r1
> -       bl      psci_get_cpu_stack_top  @ get stack top of target CPU
> -       str     r2, [r0]                @ store target PC at stack top
> -       dsb
> +       bl      psci_cpu_on_common
>
>         movw    r0, #(SUN7I_CPUCFG_BASE & 0xffff)
>         movt    r0, #(SUN7I_CPUCFG_BASE >> 16)
> @@ -179,7 +177,7 @@ psci_cpu_on:
>         orr     r6, r6, r4
>         str     r6, [r0, #0x1e4]
>
> -       mov     r0, #ARM_PSCI_RET_SUCCESS       @ Return PSCI_RET_SUCCESS
> +       mov     r0, #PSCI_RET_SUCCESS   @ Return PSCI_RET_SUCCESS
>         pop     {pc}
>
>
>
> On Fri, Apr 8, 2016 at 2:23 PM,  <macro.wave.z@gmail.com> wrote:
>> From: Hongbo Zhang <hongbo.zhang@nxp.com>
>>
>> This patch set contains two parts:
>> ARMv7 PSCI common framework: fix some issues and add v1.0 support
>> NXP (was Freescale) LS102XA: codes enhancement and add v1.0 implementation
>>
>> Changes since v1:
>> - re-organize psci_cpu_on_common, this code should be called by each platform's
>> psci_cpu_on, should not be a function calling each psci_cpu_on, all related
>> functions are updated due to this change
>> - update some registers usage, e.g. if r10 is used without push/pop, u-boot
>> cannot launch rt-kernel
>> - update some comments to be clearer, re-organize all patches for easier review
>> - add patch to check already_on or on_pending for LS102XA
>>
>>
>> Hongbo Zhang:
>> Wang Dongsheng:
>>   ARMv7: PSCI: update function psci_get_cpu_stack_top
>>   ARMv7: PSCI: update the place of saving target PC
>>   ARMv7: PSCI: add codes to save context ID for CPU_ON
>>   ARMv7: PSCI: factor out reusable psci_cpu_on_common
>>   ARMv7: PSCI: add PSCI v1.0 functions skeleton
>>   ARMv7: PSCI: ls102xa: check target CPU ID before further operations
>>   ARMv7: PSCI: ls102xa: check ALREADY_ON or ON_PENDING for CPU_ON
>>   ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention
>>   ARMv7: PSCI: ls102xa: move secure text section into OCRAM
>>   ARM: PSCI: change PSCI function IDs base and offsets
>>   ARM: PSCI: change PSCI related macros definition style
>>
>>  arch/arm/cpu/armv7/ls102xa/psci.S          | 177 +++++++++++++++++++++++++++--
>>  arch/arm/cpu/armv7/mx7/psci.S              |   7 +-
>>  arch/arm/cpu/armv7/nonsec_virt.S           |   7 ++
>>  arch/arm/cpu/armv7/psci.S                  | 113 +++++++++++++++---
>>  arch/arm/cpu/armv7/sunxi/psci_sun6i.S      |   8 +-
>>  arch/arm/cpu/armv7/sunxi/psci_sun7i.S      |   8 +-
>>  arch/arm/cpu/armv7/virt-dt.c               |  54 ++++++---
>>  arch/arm/include/asm/arch-ls102xa/config.h |   3 +-
>>  arch/arm/include/asm/psci.h                |  62 +++++++---
>>  arch/arm/mach-tegra/psci.S                 |   7 +-
>>  board/freescale/ls1021aqds/Makefile        |   1 +
>>  board/freescale/ls1021aqds/psci.S          |  36 ++++++
>>  board/freescale/ls1021atwr/Makefile        |   1 +
>>  board/freescale/ls1021atwr/psci.S          |  28 +++++
>>  include/configs/ls1021aqds.h               |   3 +
>>  include/configs/ls1021atwr.h               |   3 +
>>  16 files changed, 449 insertions(+), 69 deletions(-)
>>  create mode 100644 board/freescale/ls1021aqds/psci.S
>>  create mode 100644 board/freescale/ls1021atwr/psci.S
>>
>> --
>> 2.1.4
>>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
index e15d587..b0601a7 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
@@ -119,14 +119,12 @@  out:      mcr     p15, 0, r7, c1, c1, 0

        @ r1 = target CPU
        @ r2 = target PC
+       @ r3 = target Conetxt ID
 .globl psci_cpu_on
 psci_cpu_on:
        push    {lr}

-       mov     r0, r1
-       bl      psci_get_cpu_stack_top  @ get stack top of target CPU
-       str     r2, [r0]                @ store target PC at stack top
-       dsb
+       bl      psci_cpu_on_common

        movw    r0, #(SUN7I_CPUCFG_BASE & 0xffff)
        movt    r0, #(SUN7I_CPUCFG_BASE >> 16)
@@ -179,7 +177,7 @@  psci_cpu_on:
        orr     r6, r6, r4
        str     r6, [r0, #0x1e4]

-       mov     r0, #ARM_PSCI_RET_SUCCESS       @ Return PSCI_RET_SUCCESS
+       mov     r0, #PSCI_RET_SUCCESS   @ Return PSCI_RET_SUCCESS
        pop     {pc}