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[U-Boot,25/33] ARM64: zynqmp: Use 64bit size cell format for memory node

Message ID 5d0ef92c77630b55149b99af01acc2095427dd71.1460048744.git.michal.simek@xilinx.com
State Accepted
Commit 85d1142eb6cf1bc7f89fdbf67ba228896e158e0d
Delegated to: Michal Simek
Headers show

Commit Message

Michal Simek April 7, 2016, 5:05 p.m. UTC 
Enable option to support more then 4GB memories in single size block.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm/dts/zynqmp-ep108.dts | 2 +-
 arch/arm/dts/zynqmp.dtsi      | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)
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Patch

diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts
index 1928b0bca002..7fa0694fcd98 100644
--- a/arch/arm/dts/zynqmp-ep108.dts
+++ b/arch/arm/dts/zynqmp-ep108.dts
@@ -33,7 +33,7 @@ 
 
 	memory {
 		device_type = "memory";
-		reg = <0x0 0x0 0x40000000>;
+		reg = <0x0 0x0 0x0 0x40000000>;
 	};
 };
 
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 8413f16ee374..fb95b4828b90 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -10,7 +10,7 @@ 
 / {
 	compatible = "xlnx,zynqmp";
 	#address-cells = <2>;
-	#size-cells = <1>;
+	#size-cells = <2>;
 
 	cpus {
 		#address-cells = <1>;
@@ -247,7 +247,7 @@ 
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <1>;
-		ranges;
+		ranges = <0 0 0 0 0xffffffff>;
 
 		gic: interrupt-controller@f9010000 {
 			compatible = "arm,gic-400", "arm,cortex-a15-gic";
@@ -266,7 +266,7 @@ 
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <1>;
-		ranges;
+		ranges = <0 0 0 0 0xffffffff>;
 
 		can0: can@ff060000 {
 			compatible = "xlnx,zynq-can-1.0";