From patchwork Sun Aug 1 17:37:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Herv=C3=A9_Poussineau?= X-Patchwork-Id: 60489 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 014B91007D1 for ; Mon, 2 Aug 2010 04:48:35 +1000 (EST) Received: from localhost ([127.0.0.1]:53180 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OfdaK-0005u2-7s for incoming@patchwork.ozlabs.org; Sun, 01 Aug 2010 14:48:32 -0400 Received: from [140.186.70.92] (port=42023 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ofd0c-0007Hu-Te for qemu-devel@nongnu.org; Sun, 01 Aug 2010 14:11:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Ofd0b-000645-MS for qemu-devel@nongnu.org; Sun, 01 Aug 2010 14:11:38 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:43982) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Ofd0b-00063W-2o for qemu-devel@nongnu.org; Sun, 01 Aug 2010 14:11:37 -0400 Received: from localhost.localdomain (unknown [88.171.126.33]) by smtp5-g21.free.fr (Postfix) with ESMTP id CD2B1D480CD; Sun, 1 Aug 2010 20:11:31 +0200 (CEST) From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= To: qemu-devel@nongnu.org Date: Sun, 1 Aug 2010 19:37:18 +0200 Message-Id: <1280684242-19611-16-git-send-email-hpoussin@reactos.org> X-Mailer: git-send-email 1.7.1.GIT In-Reply-To: <4C5579DA.8050508@reactos.org> References: <4C5579DA.8050508@reactos.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [Qemu-devel] [PATCH 16/20] [MIPS] qdev: convert floppy disk controller to rc4030 device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use it in Jazz emulation Remove fdctrl_init_sysbus() function, which is not used anymore Signed-off-by: Hervé Poussineau --- hw/fdc.c | 84 ++++++++++++++++++++++++++++++++++++++++---------------- hw/fdc.h | 2 - hw/mips_jazz.c | 12 +++++-- 3 files changed, 68 insertions(+), 30 deletions(-) diff --git a/hw/fdc.c b/hw/fdc.c index 2d50bd6..d51a29c 100644 --- a/hw/fdc.c +++ b/hw/fdc.c @@ -33,6 +33,7 @@ #include "qemu-timer.h" #include "isa.h" #include "sysbus.h" +#include "rc4030.h" #include "qdev-addr.h" /********************************************************/ @@ -524,6 +525,14 @@ typedef struct FDCtrlISABus { struct FDCtrl state; } FDCtrlISABus; +typedef struct FDCtrlRC4030 { + RC4030Device busdev; + target_phys_addr_t iobase; + uint32_t irq; + uint32_t dma; + struct FDCtrl state; +} FDCtrlRC4030; + static uint32_t fdctrl_read (void *opaque, uint32_t reg) { FDCtrl *fdctrl = opaque; @@ -714,6 +723,14 @@ static void fdctrl_external_reset_isa(DeviceState *d) fdctrl_reset(s, 0); } +static void fdctrl_external_reset_rc4030(DeviceState *d) +{ + FDCtrlRC4030 *rc4030 = container_of(d, FDCtrlRC4030, busdev.qdev); + FDCtrl *s = &rc4030->state; + + fdctrl_reset(s, 0); +} + static void fdctrl_handle_tc(void *opaque, int irq, int level) { //FDCtrl *s = opaque; @@ -1888,30 +1905,6 @@ FDCtrl *fdctrl_init_isa(DriveInfo **fds) return &(DO_UPCAST(FDCtrlISABus, busdev, dev)->state); } -FDCtrl *fdctrl_init_sysbus(qemu_irq irq, int dma_chann, - target_phys_addr_t mmio_base, DriveInfo **fds) -{ - FDCtrl *fdctrl; - DeviceState *dev; - FDCtrlSysBus *sys; - - dev = qdev_create(NULL, "sysbus-fdc"); - sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev); - fdctrl = &sys->state; - fdctrl->dma_chann = dma_chann; /* FIXME */ - if (fds[0]) { - qdev_prop_set_drive_nofail(dev, "driveA", fds[0]->bdrv); - } - if (fds[1]) { - qdev_prop_set_drive_nofail(dev, "driveB", fds[1]->bdrv); - } - qdev_init_nofail(dev); - sysbus_connect_irq(&sys->busdev, 0, irq); - sysbus_mmio_map(&sys->busdev, 0, mmio_base); - - return fdctrl; -} - FDCtrl *sun4m_fdctrl_init(qemu_irq irq, target_phys_addr_t io_base, DriveInfo **fds, qemu_irq *fdc_tc) { @@ -2026,6 +2019,22 @@ static int sun4m_fdc_init1(SysBusDevice *dev) return fdctrl_init_common(fdctrl); } +static int rc4030_fdc_init1(RC4030Device *dev) +{ + FDCtrlRC4030 *rc4030 = DO_UPCAST(FDCtrlRC4030, busdev, dev); + FDCtrl *fdctrl = &rc4030->state; + int io; + + io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, fdctrl); + cpu_register_physical_memory(rc4030->iobase, 8, io); + + rc4030_init_irq(dev, &fdctrl->irq, rc4030->irq); + qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1); + fdctrl->dma_chann = rc4030->dma; + + return fdctrl_init_common(fdctrl); +} + static const VMStateDescription vmstate_isa_fdc ={ .name = "fdc", .version_id = 2, @@ -2085,11 +2094,38 @@ static SysBusDeviceInfo sun4m_fdc_info = { }, }; +static const VMStateDescription vmstate_rc4030_fdc = { + .name = "rc4030-fdc", + .version_id = 2, + .minimum_version_id = 2, + .fields = (VMStateField []) { + VMSTATE_STRUCT(state, FDCtrlRC4030, 0, vmstate_fdc, FDCtrl), + VMSTATE_END_OF_LIST() + } +}; + +static RC4030DeviceInfo rc4030_fdc_info = { + .init = rc4030_fdc_init1, + .qdev.name = "rc4030-fdc", + .qdev.size = sizeof(FDCtrlRC4030), + .qdev.vmsd = &vmstate_rc4030_fdc, + .qdev.reset = fdctrl_external_reset_rc4030, + .qdev.props = (Property[]) { + DEFINE_PROP_TADDR("iobase", FDCtrlRC4030, iobase, 0x80003000), + DEFINE_PROP_UINT32("irq", FDCtrlRC4030, irq, 1), + DEFINE_PROP_UINT32("dma", FDCtrlRC4030, dma, 0), + DEFINE_PROP_DRIVE("driveA", FDCtrlRC4030, state.drives[0].bs), + DEFINE_PROP_DRIVE("driveB", FDCtrlRC4030, state.drives[1].bs), + DEFINE_PROP_END_OF_LIST(), + }, +}; + static void fdc_register_devices(void) { isa_qdev_register(&isa_fdc_info); sysbus_register_withprop(&sysbus_fdc_info); sysbus_register_withprop(&sun4m_fdc_info); + rc4030_qdev_register(&rc4030_fdc_info); } device_init(fdc_register_devices) diff --git a/hw/fdc.h b/hw/fdc.h index b6b3772..6f28dc0 100644 --- a/hw/fdc.h +++ b/hw/fdc.h @@ -8,8 +8,6 @@ typedef struct FDCtrl FDCtrl; FDCtrl *fdctrl_init_isa(DriveInfo **fds); -FDCtrl *fdctrl_init_sysbus(qemu_irq irq, int dma_chann, - target_phys_addr_t mmio_base, DriveInfo **fds); FDCtrl *sun4m_fdctrl_init(qemu_irq irq, target_phys_addr_t io_base, DriveInfo **fds, qemu_irq *fdc_tc); int fdctrl_get_drive_type(FDCtrl *fdctrl, int drive_num); diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c index c0a27b2..3c6a495 100644 --- a/hw/mips_jazz.c +++ b/hw/mips_jazz.c @@ -109,7 +109,7 @@ void mips_jazz_init (ram_addr_t ram_size, int s_dma_dummy; NICInfo *nd; PITState *pit; - DriveInfo *fds[MAX_FD]; + DriveInfo *fd; qemu_irq esp_reset; qemu_irq *cpu_exit_irq; ram_addr_t ram_offset; @@ -216,10 +216,14 @@ void mips_jazz_init (ram_addr_t ram_size, fprintf(stderr, "qemu: too many floppy drives\n"); exit(1); } - for (n = 0; n < MAX_FD; n++) { - fds[n] = drive_get(IF_FLOPPY, 0, n); + dev = qdev_create(NULL, "rc4030-fdc"); + if ((fd = drive_get(IF_FLOPPY, 0, 0)) != NULL) { + qdev_prop_set_drive_nofail(dev, "driveA", fd->bdrv); } - fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds); + if ((fd = drive_get(IF_FLOPPY, 0, 1)) != NULL) { + qdev_prop_set_drive_nofail(dev, "driveB", fd->bdrv); + } + qdev_init_nofail(dev); /* Real time clock */ rtc_init(1980, NULL);