[ARM] 4.5.x Fix PR43698 in 4.5 branch.

Submitted by Ramana Radhakrishnan on July 30, 2010, 10:37 p.m.

Details

Message ID 1280529445.14873.40.camel@numenor
State New
Headers show

Commit Message

Ramana Radhakrishnan July 30, 2010, 10:37 p.m.
Hi, 

This patch backports the fix for PR43698 which only affects the ARM port
into the 4.5 branch. I've tested this on a cross to arm-linux-gnueabi on
qemu for armv7-a for ARM and Thumb state and found no regressions. 

Richi approved this backport to 4.5 branch on IRC and I've now committed
this to the 4.5 branch so that this is a part of 4.5.1. 

Thanks,
Ramana



2010-07-30  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	Backport from mainline.
	2010-07-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

 	PR target/43698
	* config/arm/arm.md: Split arm_rev into *arm_rev and *thumb1_rev. Set
*arm_rev to be predicable.

2010-07-30  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	Backport from mainline
	2010-07-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/43698
	* gcc.target/arm/pr43698.c: New test.

Patch hide | download patch | download mbox

Index: gcc/config/arm/arm.md
===================================================================
--- gcc/config/arm/arm.md	(revision 162710)
+++ gcc/config/arm/arm.md	(working copy)
@@ -11197,15 +11197,21 @@  (define_insn "*arm_movtas_ze" 
    (set_attr "length" "4")]
 )
 
-(define_insn "arm_rev"
+(define_insn "*arm_rev"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
 	(bswap:SI (match_operand:SI 1 "s_register_operand" "r")))]
-  "TARGET_EITHER && arm_arch6"
-  "rev\t%0, %1"
-  [(set (attr "length")
-        (if_then_else (eq_attr "is_thumb" "yes")
-		      (const_int 2)
-		      (const_int 4)))]
+  "TARGET_32BIT && arm_arch6"
+  "rev%?\t%0, %1"
+  [(set_attr "predicable" "yes")
+   (set_attr "length" "4")]
+)
+
+(define_insn "*thumb1_rev"
+  [(set (match_operand:SI 0 "s_register_operand" "=l")
+	(bswap:SI (match_operand:SI 1 "s_register_operand" "l")))]
+  "TARGET_THUMB1 && arm_arch6"
+   "rev\t%0, %1"
+  [(set_attr "length" "2")]
 )
 
 (define_expand "arm_legacy_rev"
--- /dev/null	2010-07-29 22:03:00.984228903 +0100
+++ ./pr43698.c	2010-07-27 19:11:25.000000000 +0100
@@ -0,0 +1,38 @@ 
+/* { dg-do run } */
+/* { dg-options "-Os -march=armv7-a" } */
+#include <stdint.h>
+#include <stdlib.h>
+
+
+char do_reverse_endian = 0;
+
+#  define bswap_32(x) \
+  ((((x) & 0xff000000) >> 24) | \
+   (((x) & 0x00ff0000) >>  8) | \
+   (((x) & 0x0000ff00) <<  8) | \
+   (((x) & 0x000000ff) << 24))
+
+#define EGET(X) \
+  (__extension__ ({ \
+      uint64_t __res; \
+      if (!do_reverse_endian) {    __res = (X); \
+      } else if (sizeof(X) == 4) { __res = bswap_32((X)); \
+      } \
+      __res; \
+    }))
+
+void __attribute__((noinline)) X(char **phdr, char **data, int *phoff)
+{
+  *phdr = *data + EGET(*phoff);
+}
+
+int main()
+{
+  char *phdr;
+  char *data = (char *)0x40164000;
+  int phoff = 0x34;
+  X(&phdr, &data, &phoff);
+  if (phdr != (char *)0x40164034)
+    abort ();
+  exit (0);
+}