===================================================================
RCS file: /cvsroot/src/external/gpl3/binutils/dist/gas/config/tc-vax.c,v
retrieving revision 1.10
@@ -3430,11 +3430,12 @@
}
}
+static char *vax_cons_special_reloc;
+
bfd_reloc_code_real_type
vax_cons (expressionS *exp, int size)
{
char *save;
- char *vax_cons_special_reloc;
SKIP_WHITESPACE ();
vax_cons_special_reloc = NULL;
@@ -3560,7 +3561,22 @@
: nbytes == 2 ? BFD_RELOC_16
: BFD_RELOC_32);
+ if (vax_cons_special_reloc)
+ {
+ if (*vax_cons_special_reloc == 'p')
+ {
+ switch (nbytes)
+ {
+ case 1: r = BFD_RELOC_8_PCREL; break;
+ case 2: r = BFD_RELOC_16_PCREL; break;
+ case 4: r = BFD_RELOC_32_PCREL; break;
+ default: abort ();
+ }
+ }
+ }
+
fix_new_exp (frag, where, (int) nbytes, exp, 0, r);
+ vax_cons_special_reloc = NULL;
}
char *
@@ -3598,6 +3614,8 @@
void
vax_cfi_emit_pcrel_expr (expressionS *expP, unsigned int nbytes)
{
+ vax_cons_special_reloc = "pcrel";
expP->X_add_number += nbytes;
emit_expr (expP, nbytes);
+ vax_cons_special_reloc = NULL;
}
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/except.c,v
retrieving revision 1.3
@@ -2288,7 +2288,8 @@
#endif
{
#ifdef EH_RETURN_HANDLER_RTX
- emit_move_insn (EH_RETURN_HANDLER_RTX, crtl->eh.ehr_handler);
+ rtx insn = emit_move_insn (EH_RETURN_HANDLER_RTX, crtl->eh.ehr_handler);
+ RTX_FRAME_RELATED_P (insn) = 1;
#else
error ("__builtin_eh_return not supported on this target");
#endif
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/config/m68k/m68k.md,v
retrieving revision 1.4
@@ -2132,9 +2132,9 @@
;; into the kernel to emulate fintrz. They should also be faster
;; than calling the subroutines fixsfsi or fixdfsi.
-(define_insn "fix_truncdfsi2"
+(define_insn "fix_trunc<mode>si2"
[(set (match_operand:SI 0 "nonimmediate_operand" "=dm")
- (fix:SI (fix:DF (match_operand:DF 1 "register_operand" "f"))))
+ (fix:SI (match_operand:FP 1 "register_operand" "f")))
(clobber (match_scratch:SI 2 "=d"))
(clobber (match_scratch:SI 3 "=d"))]
"TARGET_68881 && TUNE_68040"
@@ -2143,9 +2143,9 @@
return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.l %1,%0\;fmovem%.l %2,%!";
})
-(define_insn "fix_truncdfhi2"
+(define_insn "fix_trunc<mode>hi2"
[(set (match_operand:HI 0 "nonimmediate_operand" "=dm")
- (fix:HI (fix:DF (match_operand:DF 1 "register_operand" "f"))))
+ (fix:HI (match_operand:FP 1 "register_operand" "f")))
(clobber (match_scratch:SI 2 "=d"))
(clobber (match_scratch:SI 3 "=d"))]
"TARGET_68881 && TUNE_68040"
@@ -2154,9 +2154,9 @@
return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.w %1,%0\;fmovem%.l %2,%!";
})
-(define_insn "fix_truncdfqi2"
+(define_insn "fix_trunc<mode>qi2"
[(set (match_operand:QI 0 "nonimmediate_operand" "=dm")
- (fix:QI (fix:DF (match_operand:DF 1 "register_operand" "f"))))
+ (fix:QI (match_operand:FP 1 "register_operand" "f")))
(clobber (match_scratch:SI 2 "=d"))
(clobber (match_scratch:SI 3 "=d"))]
"TARGET_68881 && TUNE_68040"
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/config/vax/elf.h,v
retrieving revision 1.6
@@ -26,7 +26,7 @@
#define REGISTER_PREFIX "%"
#define REGISTER_NAMES \
{ "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
- "%r8", "%r9", "%r10", "%r11", "%ap", "%fp", "%sp", "%pc", }
+ "%r8", "%r9", "%r10", "%r11", "%ap", "%fp", "%sp", "%pc", "%psw", }
#undef SIZE_TYPE
#define SIZE_TYPE "long unsigned int"
@@ -45,18 +45,8 @@
count pushed by the CALLS and before the start of the saved registers. */
#define INCOMING_FRAME_SP_OFFSET 0
-/* Offset from the frame pointer register value to the top of the stack. */
-#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
-
-/* We use R2-R5 (call-clobbered) registers for exceptions. */
-#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 2 : INVALID_REGNUM)
-
-/* Place the top of the stack for the DWARF2 EH stackadj value. */
-#define EH_RETURN_STACKADJ_RTX \
- gen_rtx_MEM (SImode, \
- plus_constant (Pmode, \
- gen_rtx_REG (Pmode, FRAME_POINTER_REGNUM),\
- -4))
+/* We use R2-R3 (call-clobbered) registers for exceptions. */
+#define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) + 2 : INVALID_REGNUM)
/* Simple store the return handler into the call frame. */
#define EH_RETURN_HANDLER_RTX \
@@ -66,10 +56,6 @@
16))
-/* Reserve the top of the stack for exception handler stackadj value. */
-#undef STARTING_FRAME_OFFSET
-#define STARTING_FRAME_OFFSET -4
-
/* The VAX wants no space between the case instruction and the jump table. */
#undef ASM_OUTPUT_BEFORE_CASE_LABEL
#define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/config/vax/vax-protos.h,v
retrieving revision 1.5
@@ -30,7 +30,7 @@
extern void print_operand (FILE *, rtx, int);
extern void vax_notice_update_cc (rtx, rtx);
extern void vax_expand_addsub_di_operands (rtx *, enum rtx_code);
-extern bool vax_decomposed_dimode_operand_p (rtx, rtx);
+/* extern bool vax_decomposed_dimode_operand_p (rtx, rtx); */
extern const char * vax_output_int_move (rtx, rtx *, machine_mode);
extern const char * vax_output_int_add (rtx, rtx *, machine_mode);
extern const char * vax_output_int_subtract (rtx, rtx *, machine_mode);
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/config/vax/vax.c,v
retrieving revision 1.15
@@ -1,4 +1,4 @@
-/* Subroutines for insn-output.c for VAX.
+/* Subroutines used for code generation on VAX.
Copyright (C) 1987-2015 Free Software Foundation, Inc.
This file is part of GCC.
@@ -191,13 +191,17 @@
vax_expand_prologue (void)
{
int regno, offset;
- int mask = 0;
+ unsigned int mask = 0;
HOST_WIDE_INT size;
rtx insn;
offset = 20;
- for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
- if (df_regs_ever_live_p (regno) && !call_used_regs[regno])
+ /* We only care about r0 to r11 here. AP, FP, and SP are saved by CALLS.
+ Always save r2 and r3 when eh_return is called, to reserve space for
+ the stack unwinder to update them in the stack frame on exceptions. */
+ for (regno = 0; regno < VAX_AP_REGNUM; regno++)
+ if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
+ || (crtl->calls_eh_return && regno >= 2 && regno < 4))
{
mask |= 1 << regno;
offset += 4;
@@ -240,8 +244,10 @@
vax_add_reg_cfa_offset (insn, 16, pc_rtx);
offset = 20;
- for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
- if (mask & (1 << regno))
+
+ unsigned int testbit = 1; /* Used to avoid calculating (1 << regno). */
+ for (regno = 0; regno < VAX_AP_REGNUM; regno++, testbit <<= 1)
+ if (mask & testbit)
{
vax_add_reg_cfa_offset (insn, offset, gen_rtx_REG (SImode, regno));
offset += 4;
@@ -1909,12 +1915,20 @@
return true;
if (indirectable_address_p (x, strict, false))
return true;
- xfoo0 = XEXP (x, 0);
- if (MEM_P (x) && indirectable_address_p (xfoo0, strict, true))
- return true;
- if ((GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_INC)
- && BASE_REGISTER_P (xfoo0, strict))
- return true;
+ /* Note: avoid calling XEXP until needed. It may not be a valid type.
+ This fixes an assertion failure when RTX checking is enabled. */
+ if (MEM_P (x))
+ {
+ xfoo0 = XEXP (x, 0);
+ if (indirectable_address_p (xfoo0, strict, true))
+ return true;
+ }
+ if (GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_INC)
+ {
+ xfoo0 = XEXP (x, 0);
+ if (BASE_REGISTER_P (xfoo0, strict))
+ return true;
+ }
return false;
}
@@ -2366,6 +2380,9 @@
: (int_size_in_bytes (type) + 3) & ~3);
}
+#if 0
+/* This is commented out because the only usage of it was the buggy
+ 32-to-64-bit peephole optimizations that have been commented out. */
bool
vax_decomposed_dimode_operand_p (rtx lo, rtx hi)
{
@@ -2416,3 +2433,4 @@
return rtx_equal_p(lo, hi) && lo_offset + 4 == hi_offset;
}
+#endif
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/config/vax/vax.h,v
retrieving revision 1.7
@@ -120,13 +120,14 @@
The hardware registers are assigned numbers for the compiler
from 0 to just below FIRST_PSEUDO_REGISTER.
All registers that the compiler knows about must be given numbers,
- even those that are not normally considered general registers. */
-#define FIRST_PSEUDO_REGISTER 16
+ even those that are not normally considered general registers.
+ This includes PSW, which the VAX backend did not originally include. */
+#define FIRST_PSEUDO_REGISTER 17
/* 1 for registers that have pervasive standard uses
and are not available for the register allocator.
- On the VAX, these are the AP, FP, SP and PC. */
-#define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
+ On the VAX, these are the AP, FP, SP, PC, and PSW. */
+#define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1}
/* 1 for registers not available across function calls.
These must include the FIXED_REGISTERS and also any
@@ -134,7 +135,7 @@
The latter must include the registers where values are returned
and the register where structure-value addresses are passed.
Aside from that, you can include as many other registers as you like. */
-#define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
+#define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1}
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
@@ -169,12 +170,12 @@
/* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM VAX_FP_REGNUM
-/* Offset from the frame pointer register value to the top of stack. */
-#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
-
/* Base register for access to arguments of the function. */
#define ARG_POINTER_REGNUM VAX_AP_REGNUM
+/* Offset from the argument pointer register value to the CFA. */
+#define ARG_POINTER_CFA_OFFSET(FNDECL) 0
+
/* Register in which static-chain is passed to a function. */
#define STATIC_CHAIN_REGNUM 0
@@ -395,9 +396,9 @@
allocation. */
#define REGNO_OK_FOR_INDEX_P(regno) \
- ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
+ ((regno) <= VAX_PC_REGNUM || reg_renumber[regno] >= 0)
#define REGNO_OK_FOR_BASE_P(regno) \
- ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
+ ((regno) <= VAX_PC_REGNUM || reg_renumber[regno] >= 0)
/* Maximum number of registers that can appear in a valid memory address. */
@@ -424,11 +425,11 @@
/* Nonzero if X is a hard reg that can be used as an index
or if it is a pseudo reg. */
-#define REG_OK_FOR_INDEX_P(X) 1
+#define REG_OK_FOR_INDEX_P(X) ((regno) != VAX_PSW_REGNUM)
/* Nonzero if X is a hard reg that can be used as a base reg
or if it is a pseudo reg. */
-#define REG_OK_FOR_BASE_P(X) 1
+#define REG_OK_FOR_BASE_P(X) ((regno) != VAX_PSW_REGNUM)
#else
@@ -548,7 +551,7 @@
#define REGISTER_PREFIX ""
#define REGISTER_NAMES \
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
- "r8", "r9", "r10", "r11", "ap", "fp", "sp", "pc", }
+ "r8", "r9", "r10", "r11", "ap", "fp", "sp", "pc", "psw", }
/* This is BSD, so it wants DBX format. */
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/config/vax/vax.md,v
retrieving revision 1.11
@@ -532,13 +532,13 @@
;This is left out because it is very slow;
;we are better off programming around the "lack" of this insn.
+;; It's also unclear whether the condition flags would be correct.
;(define_insn "divmoddisi4"
-; [(set (match_operand:SI 0 "general_operand" "=g")
-; (div:SI (match_operand:DI 1 "general_operand" "g")
-; (match_operand:SI 2 "general_operand" "g")))
-; (set (match_operand:SI 3 "general_operand" "=g")
-; (mod:SI (match_operand:DI 1 "general_operand" "g")
-; (match_operand:SI 2 "general_operand" "g")))]
+; [(parallel [(set (match_operand:SI 0 "general_operand" "=g")
+; (div:SI (match_operand:DI 1 "general_operand" "nrmT")
+; (match_operand:SI 2 "general_operand" "nrmT")))
+; (set (match_operand:SI 3 "general_operand" "=g")
+; (mod:SI (match_dup 1) (match_dup 2)))])]
; ""
; "ediv %2,%1,%0,%3")