b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
@@ -37,7 +37,8 @@ struct pxa3xx_nand_cmdset {
struct pxa3xx_nand_flash {
char *name;
- uint32_t chip_id;
+ uint16_t chip_id; /* chip id */
+ uint16_t ext_id; /* Extend id */
uint16_t page_per_block; /* Pages per block */
uint16_t page_size; /* Page size in bytes */
uint8_t flash_width; /* Width of Flash memory (DWIDTH_M) */
@@ -253,17 +253,17 @@ static struct pxa3xx_nand_timing __devinitdata
timing[] = {
#define NAND_SETTING_MICRON &default_cmdset, &timing[2]
#define NAND_SETTING_ST &default_cmdset, &timing[3]
static struct pxa3xx_nand_flash __devinitdata builtin_flash_types[] = {
-{ "DEFAULT FLASH", 0, 0, 2048, 8, 8, ECC_NONE, 0,
NAND_SETTING_DEFAULT, },
-{ "64MiB 16-bit", 0x46ec, 32, 512, 16, 16, ECC_HAMMIN, 4096,
NAND_SETTING_SAMSUNG, },
-{ "256MiB 8-bit", 0xdaec, 64, 2048, 8, 8, ECC_HAMMIN, 2048,
NAND_SETTING_SAMSUNG, },
-{ "1GiB 8-bit", 0xd3ec, 128, 2048, 8, 8, ECC_BCH, 4096,
NAND_SETTING_SAMSUNG, },
-{ "4GiB 8-bit", 0xd7ec, 128, 4096, 8, 8, ECC_BCH, 8192,
NAND_SETTING_SAMSUNG, },
-{ "128MiB 8-bit", 0xa12c, 64, 2048, 8, 8, ECC_HAMMIN, 1024,
NAND_SETTING_MICRON, },
-{ "128MiB 16-bit", 0xb12c, 64, 2048, 16, 16, ECC_HAMMIN, 1024,
NAND_SETTING_MICRON, },
-{ "512MiB 8-bit", 0xdc2c, 64, 2048, 8, 8, ECC_HAMMIN, 4096,
NAND_SETTING_MICRON, },
-{ "512MiB 16-bit", 0xcc2c, 64, 2048, 16, 16, ECC_HAMMIN, 4096,
NAND_SETTING_MICRON, },
-{ "1GiB 8-bit", 0x382c, 128, 4096, 8, 8, ECC_BCH, 2048,
NAND_SETTING_MICRON },
-{ "256MiB 16-bit", 0xba20, 64, 2048, 16, 16, ECC_HAMMIN, 2048,
NAND_SETTING_ST, },
+{ "DEFAULT FLASH", 0, 0, 0, 2048, 8, 8, ECC_NONE,
0, NAND_SETTING_DEFAULT, },