From patchwork Thu Jul 22 21:56:59 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [10/34] openpic: convert to pci_bar_map Date: Thu, 22 Jul 2010 11:56:59 -0000 From: Blue Swirl X-Patchwork-Id: 59692 Message-Id: To: qemu-devel Use pci_bar_map() instead of a mapping function. Signed-off-by: Blue Swirl --- hw/openpic.c | 36 +++++------------------------------- 1 files changed, 5 insertions(+), 31 deletions(-) opp->nb_cpus = nb_cpus; diff --git a/hw/openpic.c b/hw/openpic.c index 01bf15f..3f97afd 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -1013,34 +1013,6 @@ static CPUReadMemoryFunc * const openpic_read[] = { &openpic_readl, }; -static void openpic_map(PCIDevice *pci_dev, int region_num, - pcibus_t addr, pcibus_t size, int type) -{ - openpic_t *opp; - - DPRINTF("Map OpenPIC\n"); - opp = (openpic_t *)pci_dev; - /* Global registers */ - DPRINTF("Register OPENPIC gbl %08x => %08x\n", - addr + 0x1000, addr + 0x1000 + 0x100); - /* Timer registers */ - DPRINTF("Register OPENPIC timer %08x => %08x\n", - addr + 0x1100, addr + 0x1100 + 0x40 * MAX_TMR); - /* Interrupt source registers */ - DPRINTF("Register OPENPIC src %08x => %08x\n", - addr + 0x10000, addr + 0x10000 + 0x20 * (OPENPIC_EXT_IRQ + 2)); - /* Per CPU registers */ - DPRINTF("Register OPENPIC dst %08x => %08x\n", - addr + 0x20000, addr + 0x20000 + 0x1000 * MAX_CPU); - cpu_register_physical_memory(addr, 0x40000, opp->mem_index); -#if 0 // Don't implement ISU for now - opp_io_memory = cpu_register_io_memory(openpic_src_read, - openpic_src_write); - cpu_register_physical_memory(isu_base, 0x20 * (EXT_IRQ + 2), - opp_io_memory); -#endif -} - static void openpic_save_IRQ_queue(QEMUFile* f, IRQ_queue_t *q) { unsigned int i; @@ -1198,12 +1170,14 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, /* Register I/O spaces */ pci_register_bar((PCIDevice *)opp, 0, 0x40000, - PCI_BASE_ADDRESS_SPACE_MEMORY, &openpic_map); + PCI_BASE_ADDRESS_SPACE_MEMORY, NULL); } else { opp = qemu_mallocz(sizeof(openpic_t)); } - opp->mem_index = cpu_register_io_memory(openpic_read, - openpic_write, opp); + opp->mem_index = cpu_register_io_memory(openpic_read, openpic_write, opp); + if (bus) { + pci_bar_map((PCIDevice *)opp, 0, 0, 0x40000, 0, opp->mem_index); + } // isu_base &= 0xFFFC0000;