@@ -128,9 +128,9 @@ static void omap_update_display(void *opaque)
frame_offset = 0;
if (omap_lcd->plm != 2) {
- cpu_physical_memory_read(omap_lcd->dma->phys_framebuffer[
- omap_lcd->dma->current_frame],
- (void *)omap_lcd->palette, 0x200);
+ address_space_read(omap_lcd->dma->phys_framebuffer[
+ omap_lcd->dma->current_frame],
+ (void *)omap_lcd->palette, 0x200);
switch (omap_lcd->palette[0] >> 12 & 7) {
case 3 ... 7:
frame_offset += 0x200;
@@ -280,7 +280,7 @@ static void omap_lcd_update(struct omap_lcd_panel_s *s) {
s->dma->phys_framebuffer[1] = s->dma->src_f2_top;
if (s->plm != 2 && !s->palette_done) {
- cpu_physical_memory_read(
+ address_space_read(
s->dma->phys_framebuffer[s->dma->current_frame],
(void *)s->palette, 0x200);
s->palette_done = 1;
@@ -309,7 +309,7 @@ static void pxa2xx_descriptor_load(PXA2xxLCDState *s)
continue;
}
- cpu_physical_memory_read(descptr, &desc, sizeof(desc));
+ address_space_read(descptr, &desc, sizeof(desc));
s->dma_ch[i].descriptor = le32_to_cpu(desc.fdaddr);
s->dma_ch[i].source = le32_to_cpu(desc.fsaddr);
s->dma_ch[i].id = le32_to_cpu(desc.fidr);
@@ -853,7 +853,7 @@ static void pxa2xx_update_display(void *opaque)
}
if (s->dma_ch[ch].command & LDCMD_PAL) {
- cpu_physical_memory_read(fbptr, s->dma_ch[ch].pbuffer,
+ address_space_read(fbptr, s->dma_ch[ch].pbuffer,
MAX(LDCMD_LENGTH(s->dma_ch[ch].command),
sizeof(s->dma_ch[ch].pbuffer)));
pxa2xx_palette_parse(s, ch, s->bpp);
@@ -622,7 +622,7 @@ int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
for (i = 0; i < ab->nr_entries; i++) {
hwaddr len = ents[i].length;
(*iov)[i].iov_len = ents[i].length;
- (*iov)[i].iov_base = cpu_physical_memory_map(ents[i].addr, &len, 1);
+ (*iov)[i].iov_base = address_space_map(ents[i].addr, &len, 1);
if (!(*iov)[i].iov_base || len != ents[i].length) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
" resource %d element %d\n",
@@ -642,8 +642,8 @@ void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count)
int i;
for (i = 0; i < count; i++) {
- cpu_physical_memory_unmap(iov[i].iov_base, iov[i].iov_len, 1,
- iov[i].iov_len);
+ address_space_unmap(iov[i].iov_base, iov[i].iov_len, 1,
+ iov[i].iov_len);
}
g_free(iov);
}
@@ -223,9 +223,9 @@ static void channel_load_g(struct fs_dma_ctrl *ctrl, int c)
hwaddr addr = channel_reg(ctrl, c, RW_GROUP);
/* Load and decode. FIXME: handle endianness. */
- cpu_physical_memory_read (addr,
- (void *) &ctrl->channels[c].current_g,
- sizeof ctrl->channels[c].current_g);
+ address_space_read(addr,
+ (void *) &ctrl->channels[c].current_g,
+ sizeof ctrl->channels[c].current_g);
}
static void dump_c(int ch, struct dma_descr_context *c)
@@ -255,9 +255,9 @@ static void channel_load_c(struct fs_dma_ctrl *ctrl, int c)
hwaddr addr = channel_reg(ctrl, c, RW_GROUP_DOWN);
/* Load and decode. FIXME: handle endianness. */
- cpu_physical_memory_read (addr,
- (void *) &ctrl->channels[c].current_c,
- sizeof ctrl->channels[c].current_c);
+ address_space_read(addr,
+ (void *) &ctrl->channels[c].current_c,
+ sizeof ctrl->channels[c].current_c);
D(dump_c(c, &ctrl->channels[c].current_c));
/* I guess this should update the current pos. */
@@ -273,9 +273,9 @@ static void channel_load_d(struct fs_dma_ctrl *ctrl, int c)
/* Load and decode. FIXME: handle endianness. */
D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
- cpu_physical_memory_read (addr,
- (void *) &ctrl->channels[c].current_d,
- sizeof ctrl->channels[c].current_d);
+ address_space_read(addr,
+ (void *) &ctrl->channels[c].current_d,
+ sizeof ctrl->channels[c].current_d);
D(dump_d(c, &ctrl->channels[c].current_d));
ctrl->channels[c].regs[RW_DATA] = addr;
@@ -288,9 +288,9 @@ static void channel_store_c(struct fs_dma_ctrl *ctrl, int c)
/* Encode and store. FIXME: handle endianness. */
D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
D(dump_d(c, &ctrl->channels[c].current_d));
- cpu_physical_memory_write (addr,
- (void *) &ctrl->channels[c].current_c,
- sizeof ctrl->channels[c].current_c);
+ address_space_write(addr,
+ (void *) &ctrl->channels[c].current_c,
+ sizeof ctrl->channels[c].current_c);
}
static void channel_store_d(struct fs_dma_ctrl *ctrl, int c)
@@ -299,9 +299,9 @@ static void channel_store_d(struct fs_dma_ctrl *ctrl, int c)
/* Encode and store. FIXME: handle endianness. */
D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
- cpu_physical_memory_write (addr,
- (void *) &ctrl->channels[c].current_d,
- sizeof ctrl->channels[c].current_d);
+ address_space_write(addr,
+ (void *) &ctrl->channels[c].current_d,
+ sizeof ctrl->channels[c].current_d);
}
static inline void channel_stop(struct fs_dma_ctrl *ctrl, int c)
@@ -431,7 +431,7 @@ static int channel_out_run(struct fs_dma_ctrl *ctrl, int c)
if (len > sizeof buf)
len = sizeof buf;
- cpu_physical_memory_read (saved_data_buf, buf, len);
+ address_space_read(saved_data_buf, buf, len);
out_eop = ((saved_data_buf + len) ==
ctrl->channels[c].current_d.after) &&
@@ -512,7 +512,7 @@ static int channel_in_process(struct fs_dma_ctrl *ctrl, int c,
if (len > buflen)
len = buflen;
- cpu_physical_memory_write (saved_data_buf, buf, len);
+ address_space_write(saved_data_buf, buf, len);
saved_data_buf += len;
if (saved_data_buf ==