[avr] Fix multiple ICE fallout of PR 69764

Message ID 87pov2saxk.fsf@jaguar.corp.atmel.com
State New
Headers show

Commit Message

Senthil Kumar Selvaraj March 10, 2016, 1:46 p.m.
Hi,

   This patch fixes ~230 internal compiler errors that showed up after
   the fix for PR 69764. After the patch, target backends need to
   explicitly specify mode for operand 2 of shift and rotate patterns -
   see md.texi mod at
   https://gcc.gnu.org/viewcvs/gcc/trunk/gcc/doc/md.texi?r1=233358&r2=233613&pathrev=233613.

   The avr backend had VOIDmode as the mode for rotl SPN, and this patch
   sets it to the mode of the insn to fix the problem.

   Reg testing shows ICE fixes and no new failures.

   If this is ok, could someone commit please? I don't have commit
   access.

Regards
Senthil

2016-03-10  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

	* config/avr/avr.md (rotl<mode>3): Set
	mode for operand 2.

Comments

Denis Chertykov March 15, 2016, 4:22 p.m. | #1
2016-03-10 16:46 GMT+03:00 Senthil Kumar Selvaraj
<senthil_kumar.selvaraj@atmel.com>:
> Hi,
>
>    This patch fixes ~230 internal compiler errors that showed up after
>    the fix for PR 69764. After the patch, target backends need to
>    explicitly specify mode for operand 2 of shift and rotate patterns -
>    see md.texi mod at
>    https://gcc.gnu.org/viewcvs/gcc/trunk/gcc/doc/md.texi?r1=233358&r2=233613&pathrev=233613.
>
>    The avr backend had VOIDmode as the mode for rotl SPN, and this patch
>    sets it to the mode of the insn to fix the problem.
>
>    Reg testing shows ICE fixes and no new failures.
>
>    If this is ok, could someone commit please? I don't have commit
>    access.
>
> Regards
> Senthil
>
> 2016-03-10  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
>
>         * config/avr/avr.md (rotl<mode>3): Set
>         mode for operand 2.

Committed.

Denis.

Patch

diff --git gcc/config/avr/avr.md gcc/config/avr/avr.md
index ff26f2e..c988446 100644
--- gcc/config/avr/avr.md
+++ gcc/config/avr/avr.md
@@ -3351,7 +3351,7 @@ 
 (define_expand "rotl<mode>3"
   [(parallel [(set (match_operand:HISI 0 "register_operand" "")
                    (rotate:HISI (match_operand:HISI 1 "register_operand" "")
-                                (match_operand:VOID 2 "const_int_operand" "")))
+                                (match_operand:HISI 2 "const_int_operand" "")))
               (clobber (match_dup 3))])]
   ""
   {