| Message ID | 1457486494-11377-3-git-send-email-qiang.zhao@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Scott Wood |
| Headers | show |
On Wed, Mar 09, 2016 at 09:21:30AM +0800, Zhao Qiang wrote: > Add uqe_serial document to > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > --- > Changes for v2 > - modify tx/rx-clock-name specification > Changes for v3 > - NA > Changes for v4 > - drop device_type > - modify to SoC specific compatible > Changes for v5 > - add fsl to compatible as prefix > > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt Acked-by: Rob Herring <robh@kernel.org>
On Fri, Mar 18, 2016 at 12:28AM, Rob Herring wrote: > -----Original Message----- > From: Rob Herring [mailto:robh@kernel.org] > Sent: Friday, March 18, 2016 12:28 AM > To: Qiang Zhao <qiang.zhao@nxp.com> > Cc: oss@buserror.net; Yang-Leo Li <leoyang.li@nxp.com>; Xiaobo Xie > <xiaobo.xie@nxp.com>; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; linuxppc-dev@lists.ozlabs.org > Subject: Re: [PATCH v5 3/7] QE: Add uqe_serial document to bindings > > On Wed, Mar 09, 2016 at 09:21:30AM +0800, Zhao Qiang wrote: > > Add uqe_serial document to > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt > > > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > > --- > > Changes for v2 > > - modify tx/rx-clock-name specification Changes for v3 > > - NA > > Changes for v4 > > - drop device_type > > - modify to SoC specific compatible > > Changes for v5 > > - add fsl to compatible as prefix > > > > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 18 > ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt > > Acked-by: Rob Herring <robh@kernel.org> Thank you for reviewing! BR -Zhao Qiang
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt new file mode 100644 index 0000000..5dc3089 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt @@ -0,0 +1,18 @@ +* Serial + +Currently defined compatibles: +- fsl,t1040-ucc-uart + +Properties for fsl,t1040-ucc-uart: +port-number : port number of UCC-UART +tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source, + should be "clk1"-"clk28" for external clock source. + +Example: + + ucc_serial: ucc@2200 { + compatible = "fsl,t1040-ucc-uart"; + port-number = <0>; + rx-clock-name = "brg2"; + tx-clock-name = "brg2"; + };
Add uqe_serial document to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> --- Changes for v2 - modify tx/rx-clock-name specification Changes for v3 - NA Changes for v4 - drop device_type - modify to SoC specific compatible Changes for v5 - add fsl to compatible as prefix .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt