Patchwork [4/5] seabios: acpi: split out piix4 pm logic.

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Submitter Isaku Yamahata
Date July 20, 2010, 7:37 a.m.
Message ID <4ae5ede1542b4fb555f5482c34878f3dfb3c1023.1279611182.git.yamahata@valinux.co.jp>
Download mbox | patch
Permalink /patch/59282/
State New
Headers show

Comments

Isaku Yamahata - July 20, 2010, 7:37 a.m.
split out piix4 pm logic.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>

---
Changes v2 -> v3
- eliminated cpu_to_le32() stuff. The code move is done by another patch.
---
 src/acpi.c       |   14 ++++++++++----
 src/dev-i440fx.c |   15 +++++++++++++++
 src/dev-i440fx.h |    1 +
 3 files changed, 26 insertions(+), 4 deletions(-)

Patch

diff --git a/src/acpi.c b/src/acpi.c
index 97b496d..5818d4c 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -12,6 +12,7 @@ 
 #include "pci_ids.h" // PCI_VENDOR_ID_INTEL
 #include "pci_regs.h" // PCI_INTERRUPT_LINE
 #include "paravirt.h"
+#include "dev-i440fx.h" // piix4_fadt_init
 
 /****************************************************/
 /* ACPI tables init */
@@ -212,6 +213,14 @@  build_header(struct acpi_table_header *h, u32 sig, int len, u8 rev)
     h->checksum -= checksum(h, len);
 }
 
+static const struct pci_device_id fadt_init_tbl[] = {
+    /* PIIX4 Power Management device (for ACPI) */
+    PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
+               piix4_fadt_init),
+
+    PCI_DEVICE_END
+};
+
 static void*
 build_fadt(int bdf)
 {
@@ -241,8 +250,6 @@  build_fadt(int bdf)
     int pm_sci_int = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
     fadt->sci_int = cpu_to_le16(pm_sci_int);
     fadt->smi_cmd = cpu_to_le32(PORT_SMI_CMD);
-    fadt->acpi_enable = 0xf1;
-    fadt->acpi_disable = 0xf0;
     fadt->pm1a_evt_blk = cpu_to_le32(PORT_ACPI_PM_BASE);
     fadt->pm1a_cnt_blk = cpu_to_le32(PORT_ACPI_PM_BASE + 0x04);
     fadt->pm_tmr_blk = cpu_to_le32(PORT_ACPI_PM_BASE + 0x08);
@@ -251,8 +258,7 @@  build_fadt(int bdf)
     fadt->pm_tmr_len = 4;
     fadt->plvl2_lat = cpu_to_le16(0xfff); // C2 state not supported
     fadt->plvl3_lat = cpu_to_le16(0xfff); // C3 state not supported
-    fadt->gpe0_blk = cpu_to_le32(0xafe0);
-    fadt->gpe0_blk_len = 4;
+    pci_init_device(fadt_init_tbl, bdf, fadt);
     /* WBINVD + PROC_C1 + SLP_BUTTON + FIX_RTC */
     fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 5) | (1 << 6));
 
diff --git a/src/dev-i440fx.c b/src/dev-i440fx.c
index 864a52c..15c6cac 100644
--- a/src/dev-i440fx.c
+++ b/src/dev-i440fx.c
@@ -14,6 +14,7 @@ 
 #include "ioport.h" // outb
 #include "pci.h" // pci_config_writeb
 #include "pci_regs.h" // PCI_INTERRUPT_LINE
+#include "acpi.h"
 #include "dev-i440fx.h"
 
 /* PIIX3/PIIX4 PCI to ISA bridge */
@@ -55,3 +56,17 @@  void piix4_pm_init(u16 bdf, void *arg)
     pci_config_writel(bdf, 0x90, PORT_SMB_BASE | 1);
     pci_config_writeb(bdf, 0xd2, 0x09); /* enable SMBus io space */
 }
+
+#define PIIX4_ACPI_ENABLE       0xf1
+#define PIIX4_ACPI_DISABLE      0xf0
+#define PIIX4_GPE0_BLK          0xafe0
+#define PIIX4_GPE0_BLK_LEN      4
+
+void piix4_fadt_init(u16 bdf, void *arg)
+{
+    struct fadt_descriptor_rev1 *fadt = arg;
+    fadt->acpi_enable = PIIX4_ACPI_ENABLE;
+    fadt->acpi_disable = PIIX4_ACPI_DISABLE;
+    fadt->gpe0_blk = cpu_to_le32(PIIX4_GPE0_BLK);
+    fadt->gpe0_blk_len = PIIX4_GPE0_BLK_LEN;
+}
diff --git a/src/dev-i440fx.h b/src/dev-i440fx.h
index ded5740..661860a 100644
--- a/src/dev-i440fx.h
+++ b/src/dev-i440fx.h
@@ -6,5 +6,6 @@ 
 void piix_isa_bridge_init(u16 bdf, void *arg);
 void piix_ide_init(u16 bdf, void *arg);
 void piix4_pm_init(u16 bdf, void *arg);
+void piix4_fadt_init(u16 bdf, void *arg);
 
 #endif // __I440FX_H