From patchwork Sat Jul 17 14:25:22 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernd Schmidt X-Patchwork-Id: 59140 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 89777B70A7 for ; Sun, 18 Jul 2010 00:25:57 +1000 (EST) Received: (qmail 16013 invoked by alias); 17 Jul 2010 14:25:54 -0000 Received: (qmail 15998 invoked by uid 22791); 17 Jul 2010 14:25:53 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 17 Jul 2010 14:25:48 +0000 Received: (qmail 23287 invoked from network); 17 Jul 2010 14:25:45 -0000 Received: from unknown (HELO ?84.152.238.80?) (bernds@127.0.0.2) by mail.codesourcery.com with ESMTPA; 17 Jul 2010 14:25:45 -0000 Message-ID: <4C41BD52.5040905@codesourcery.com> Date: Sat, 17 Jul 2010 16:25:22 +0200 From: Bernd Schmidt User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.10) Gecko/20100625 Thunderbird/3.0.5 MIME-Version: 1.0 To: "H.J. Lu" CC: Jeff Law , GCC Patches Subject: Re: New optimization for reload_combine References: <4C4035C3.9080305@codesourcery.com> <4C40A5BD.9080208@redhat.com> <4C40F005.3060507@codesourcery.com> In-Reply-To: Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On 07/17/2010 04:38 AM, H.J. Lu wrote: > This caused: > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970 Apparently, the sse_prologue_save_insn is broken. Index: i386.md =================================================================== --- i386.md (revision 162146) +++ i386.md (working copy) @@ -17944,7 +17944,7 @@ (define_split (define_insn "sse_prologue_save_insn" [(set (mem:BLK (plus:DI (match_operand:DI 0 "register_operand" "R") - (match_operand:DI 4 "const_int_operand" "n"))) + (const_int -127))) (unspec:BLK [(reg:DI XMM0_REG) (reg:DI XMM1_REG) (reg:DI XMM2_REG) @@ -17956,14 +17956,12 @@ (define_insn "sse_prologue_save_insn" (use (match_operand:DI 1 "register_operand" "r")) (use (match_operand:DI 2 "const_int_operand" "i")) (use (label_ref:DI (match_operand 3 "" "X"))) - (use (match_operand:DI 5 "const_int_operand" "i"))] - "TARGET_64BIT - && INTVAL (operands[4]) + X86_64_SSE_REGPARM_MAX * 16 - 16 < 128 - && INTVAL (operands[4]) + INTVAL (operands[2]) * 16 >= -128" + (use (match_operand:DI 4 "const_int_operand" "i"))] + "TARGET_64BIT" { int i; operands[0] = gen_rtx_MEM (Pmode, - gen_rtx_PLUS (Pmode, operands[0], operands[4])); + gen_rtx_PLUS (Pmode, operands[0], GEN_INT (-127))); /* VEX instruction with a REX prefix will #UD. */ if (TARGET_AVX && GET_CODE (XEXP (operands[0], 0)) != PLUS) gcc_unreachable (); @@ -17971,15 +17969,16 @@ (define_insn "sse_prologue_save_insn" output_asm_insn ("jmp\t%A1", operands); for (i = X86_64_SSE_REGPARM_MAX - 1; i >= INTVAL (operands[2]); i--) { - operands[4] = adjust_address (operands[0], DImode, i*16); - operands[5] = gen_rtx_REG (TImode, SSE_REGNO (i)); - PUT_MODE (operands[4], TImode); + rtx xops[2]; + xops[0] = adjust_address (operands[0], DImode, i*16); + xops[1] = gen_rtx_REG (TImode, SSE_REGNO (i)); + PUT_MODE (operands[0], TImode); if (GET_CODE (XEXP (operands[0], 0)) != PLUS) output_asm_insn ("rex", operands); if (crtl->stack_alignment_needed < 128) - output_asm_insn ("%vmovsd\t{%5, %4|%4, %5}", operands); + output_asm_insn ("%vmovsd\t{%1, %0|%0, %1}", xops); else - output_asm_insn ("%vmovaps\t{%5, %4|%4, %5}", operands); + output_asm_insn ("%vmovaps\t{%1, %0|%0, %1}", xops); } targetm.asm_out.internal_label (asm_out_file, "L", CODE_LABEL_NUMBER (operands[3])); @@ -17991,7 +17990,7 @@ (define_insn "sse_prologue_save_insn" ;; 2 bytes for jump and opernds[4] bytes for each save. (set (attr "length") (plus (const_int 2) - (mult (symbol_ref ("INTVAL (operands[5])")) + (mult (symbol_ref ("INTVAL (operands[4])")) (symbol_ref ("X86_64_SSE_REGPARM_MAX - INTVAL (operands[2])"))))) (set_attr "memory" "store") (set_attr "modrm" "0") diff -dru old/nest-stdar-1.s new/nest-stdar-1.s --- old/nest-stdar-1.s 2010-07-17 14:10:40.308605357 +0000 +++ new/nest-stdar-1.s 2010-07-17 14:00:30.592312121 +0000 @@ -9,25 +9,24 @@ subq $48, %rsp .cfi_def_cfa_offset 56 leaq 0(,%rax,4), %rcx - leaq 39(%rsp), %rdx movl $.L2, %eax subq %rcx, %rax jmp *%rax - movaps %xmm7, -15(%rdx) - movaps %xmm6, -31(%rdx) - movaps %xmm5, -47(%rdx) - movaps %xmm4, -63(%rdx) - movaps %xmm3, -79(%rdx) - movaps %xmm2, -95(%rdx) - movaps %xmm1, -111(%rdx) - movaps %xmm0, -127(%rdx) + movaps %xmm7, 24(%rsp) + movaps %xmm6, 8(%rsp) + movaps %xmm5, -8(%rsp) + movaps %xmm4, -24(%rsp) + movaps %xmm3, -40(%rsp) + movaps %xmm2, -56(%rsp) + movaps %xmm1, -72(%rsp) + movaps %xmm0, -88(%rsp) It's implementing a crazy jump table, which requires that all insns have the same length, which in turn requires that no one modifies the address in the pattern. I can fix this testcase with the patch below, but I'll leave it for the x86 maintainers to choose this fix or another. Bernd