From patchwork Sat Jul 17 13:41:04 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard W.M. Jones" X-Patchwork-Id: 59139 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 74614B6F04 for ; Sat, 17 Jul 2010 23:42:23 +1000 (EST) Received: from localhost ([127.0.0.1]:56907 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Oa7em-00089F-Qo for incoming@patchwork.ozlabs.org; Sat, 17 Jul 2010 09:42:20 -0400 Received: from [140.186.70.92] (port=52609 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Oa7dc-00087J-Gw for qemu-devel@nongnu.org; Sat, 17 Jul 2010 09:41:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Oa7db-00050X-39 for qemu-devel@nongnu.org; Sat, 17 Jul 2010 09:41:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33710) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Oa7da-00050P-Or for qemu-devel@nongnu.org; Sat, 17 Jul 2010 09:41:07 -0400 Received: from int-mx03.intmail.prod.int.phx2.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.16]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o6HDf6w6022415 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Sat, 17 Jul 2010 09:41:06 -0400 Received: from localhost (vpn1-5-71.ams2.redhat.com [10.36.5.71]) by int-mx03.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o6HDf5jt031927 for ; Sat, 17 Jul 2010 09:41:05 -0400 Date: Sat, 17 Jul 2010 14:41:04 +0100 From: "Richard W.M. Jones" To: qemu-devel@nongnu.org Message-ID: <20100717134104.GB20292@amd.home.annexia.org> References: <20100717133930.GC19767@amd.home.annexia.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20100717133930.GC19767@amd.home.annexia.org> User-Agent: Mutt/1.5.18 (2008-05-17) X-Scanned-By: MIMEDefang 2.67 on 10.5.11.16 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. Subject: [Qemu-devel] [PATCH 2/2] fw_cfg: Add blit operation for copying kernel, initrd, .. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c index 37e6f1f..12206ea 100644 --- a/hw/fw_cfg.c +++ b/hw/fw_cfg.c @@ -55,6 +55,11 @@ struct FWCfgState { uint32_t cur_offset; }; +/* Target address for blit operations. Only writes to lower 4GB + * addresses are supported . + */ +static uint32_t blitaddr = 0; + static void fw_cfg_write(FWCfgState *s, uint8_t value) { int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL); @@ -98,7 +103,17 @@ static uint8_t fw_cfg_read(FWCfgState *s) if (s->cur_entry == FW_CFG_INVALID || !e->data || s->cur_offset >= e->len) ret = 0; - else + else if (s->cur_entry & FW_CFG_BLIT) { + if (blitaddr == 0) + ret = 0; /* guest must set up a blit address beforehand */ + else { + cpu_physical_memory_write ((target_phys_addr_t) blitaddr, + &e->data[s->cur_offset], + e->len - s->cur_offset); + s->cur_offset += e->len; + ret = 1; + } + } else ret = e->data[s->cur_offset++]; FW_CFG_DPRINTF("read %d\n", ret); @@ -351,6 +366,8 @@ FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port, fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); fw_cfg_add_i16(s, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu); + fw_cfg_add_bytes(s, FW_CFG_BLIT_ADDR | FW_CFG_WRITE_CHANNEL, + (uint8_t *)&blitaddr, sizeof blitaddr); return s; } diff --git a/hw/fw_cfg.h b/hw/fw_cfg.h index 4d13a4f..c64f1e8 100644 --- a/hw/fw_cfg.h +++ b/hw/fw_cfg.h @@ -30,11 +30,14 @@ #define FW_CFG_FILE_FIRST 0x20 #define FW_CFG_FILE_SLOTS 0x10 -#define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST+FW_CFG_FILE_SLOTS) +#define FW_CFG_BLIT_ADDR 0x30 +#define FW_CFG_MAX_ENTRY (FW_CFG_BLIT_ADDR+1) + +#define FW_CFG_BLIT 0x2000 #define FW_CFG_WRITE_CHANNEL 0x4000 #define FW_CFG_ARCH_LOCAL 0x8000 -#define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL) +#define FW_CFG_ENTRY_MASK ~(FW_CFG_BLIT | FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL) #define FW_CFG_INVALID 0xffff diff --git a/pc-bios/optionrom/linuxboot.S b/pc-bios/optionrom/linuxboot.S index c109363..b08c69e 100644 --- a/pc-bios/optionrom/linuxboot.S +++ b/pc-bios/optionrom/linuxboot.S @@ -106,10 +106,10 @@ copy_kernel: /* We're now running in 16-bit CS, but 32-bit ES! */ /* Load kernel and initrd */ - read_fw_blob_addr32(FW_CFG_KERNEL) - read_fw_blob_addr32(FW_CFG_INITRD) - read_fw_blob_addr32(FW_CFG_CMDLINE) - read_fw_blob_addr32(FW_CFG_SETUP) + read_fw_blit(FW_CFG_KERNEL) + read_fw_blit(FW_CFG_INITRD) + read_fw_blit(FW_CFG_CMDLINE) + read_fw_blit(FW_CFG_SETUP) /* And now jump into Linux! */ mov $0, %eax diff --git a/pc-bios/optionrom/optionrom.h b/pc-bios/optionrom/optionrom.h index fbdd48a..a4dd49c 100644 --- a/pc-bios/optionrom/optionrom.h +++ b/pc-bios/optionrom/optionrom.h @@ -50,6 +50,27 @@ bswap %eax .endm +/* + * Write a variable from the fw_cfg device. + * In: %eax + * Clobbers: %edx + */ +.macro write_fw VAR + push %eax + mov $(\VAR|FW_CFG_WRITE_CHANNEL), %ax + mov $BIOS_CFG_IOPORT_CFG, %dx + outw %ax, (%dx) + pop %eax + mov $BIOS_CFG_IOPORT_DATA, %dx + outb %al, (%dx) + shr $8, %eax + outb %al, (%dx) + shr $8, %eax + outb %al, (%dx) + shr $8, %eax + outb %al, (%dx) +.endm + #define read_fw_blob_pre(var) \ read_fw var ## _ADDR; \ mov %eax, %edi; \ @@ -87,6 +108,22 @@ */ \ .dc.b 0x67,0xf3,0x6c +/* + * Fast blit data from fw_cfg device into physical memory. + * + * Works as a much faster equivalent to read_fw_blob_add32. Except + * that var##_SIZE is ignored -- instead the host always blits to + * the end of the available data in the requested entry. + */ +#define read_fw_blit(var) \ + read_fw var ## _ADDR; \ + write_fw FW_CFG_BLIT_ADDR; \ + mov $(var ## _DATA|FW_CFG_BLIT), %ax; \ + mov $BIOS_CFG_IOPORT_CFG, %edx; \ + outw %ax, (%dx); \ + mov $BIOS_CFG_IOPORT_DATA, %dx; \ + inb (%dx), %al + #define OPTION_ROM_START \ .code16; \ .text; \