Patchwork [doc,testsuite,libgfortran] Avoid use of SSE/SSE2/SSE3 on Solaris 8/9 x86

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Submitter Rainer Orth
Date July 16, 2010, 2:38 p.m.
Message ID <yddaaprv6du.fsf@manam.CeBiTec.Uni-Bielefeld.DE>
Download mbox | patch
Permalink /patch/59110/
State New
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Comments

Rainer Orth - July 16, 2010, 2:38 p.m.
Uros Bizjak <ubizjak@gmail.com> writes:

>>> BTW: I think you will need to change all *-check.h checks (minus
>>> MMX/3dNOW! ones) to prevent tests from touching xmm regs.
>>
>> For complete correctness, you're certainly right.  On the other hand,
>> Solaris 8 and 9 won't run on very recent processors, so I've only
>> changed those *-check.h tests that exhibited execution failures.  I can
>> of course change all the *-check.h checks for generality if you prefer.
>
> Ah, I see. I'll leave this to you. Perhaps you could put a comment in
> net sse-os-support.h, why partial check is OK.

I'll restrict the changes to sse{,2,3}-check.h since I cannot check
anything else except for syntactic validity, but I've added an
appropriate comment before sse_os_support ().

Here's the patch I've come up with.  __get_cpuid () is now only used in
gcc.dg/compat/vector-[12]b_main.c for AVX support.  Someone with the
necessary hardware could change this to use dg-require-effective-target
avx_runtime instead.

A bootstrap on i386-pc-solaris2.10 with GNU as succeeded without
regressions, so there are no syntax errors.  A i386-pc-solaris2.8
bootstrap is still running.

Ok for mainline and the branches if that passes?

Thanks.
	Rainer


2010-06-14  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	gcc:
	* doc/sourcebuild.texi (Effective-Target Keywords): Document
	sse_runtime, sse2_runtime.

	gcc/testsuite:
	* lib/target-supports.exp (check_sse_os_support_available): New
	proc.
	(check_sse_hw_available): New proc.
	(check_effective_target_sse_runtime): New proc.
	(check_effective_target_sse2_runtime): New proc.
	* lib/fortran-torture.exp (get-fortran-torture-options): Only add
	-msse2 if check_sse_os_support_available.
	* g++.dg/vect/vect.exp: Only run -msse2 tests if
	check_sse_os_support_available.
	* gcc.dg/vect/vect.exp: Likewise.
	* gfortran.dg/vect/vect.exp: Likewise.
	* gcc.target/i386/sol2-check: Renamed to ...
	* gcc.target/i386/sse-os-support.h: ... this.
	(sol2_check): Renamed to ...
	(sse_os_support): ... this.
	Only test movss with xmm registers.
	* gcc.target/i386/sse-check.h: Reflect new header and function names.
	Removed ILL_INSN, ILL_INSN_LEN.
	* gcc.target/i386/sse2-check.h: Likewise.
	* gcc.target/i386/sse3-check.h: Likewise.
	* gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime.
	Removed cpuid.h, __get_cpuid test.
	* g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime.
	Removed cpuid.h, __get_cpuid test.
	* g++.dg/other/pr40446.C: Likewise.
	* gcc.dg/compat/union-m128-1_main.c: Likewise.
	* gcc.dg/compat/vector-1a_main.c: Likewise.
	* gcc.dg/compat/vector-2a_main.c: Likewise.
	* gcc.dg/pr36584.c: Likewise.
	* gcc.dg/pr37544.c: Likewise.
	* gcc.dg/torture/pr16104-1.c: Likewise.
	* gcc.dg/torture/stackalign/alloca-2.c: Likewise.
	* gcc.dg/torture/stackalign/alloca-3.c: Likewise.
	* gcc.dg/torture/stackalign/push-1.c: Likewise.
	* gcc.dg/torture/stackalign/vararg-3.c: Likewise.
	* gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test.
	* gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target
	sse2_runtime.
	* gcc.dg/torture/pr35771-2.c: Likewise.
	* gcc.dg/torture/pr35771-3.c: Likewise.
	* gcc.target/i386/pr39315-2.c: Likewise.
	* gcc.target/i386/pr39315-4.c: Likewise.
	* gcc.target/i386/vperm-v2df.c: Likewise.
	* gcc.target/i386/vperm-v2di.c: Likewise.
	* gcc.target/i386/vperm-v4si-1.c: Likewise.
	* gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target
	sse_runtime.
Uros Bizjak - July 17, 2010, 11:23 a.m.
On Fri, Jul 16, 2010 at 4:38 PM, Rainer Orth
<ro@cebitec.uni-bielefeld.de> wrote:
> Uros Bizjak <ubizjak@gmail.com> writes:
>
>>>> BTW: I think you will need to change all *-check.h checks (minus
>>>> MMX/3dNOW! ones) to prevent tests from touching xmm regs.
>>>
>>> For complete correctness, you're certainly right.  On the other hand,
>>> Solaris 8 and 9 won't run on very recent processors, so I've only
>>> changed those *-check.h tests that exhibited execution failures.  I can
>>> of course change all the *-check.h checks for generality if you prefer.
>>
>> Ah, I see. I'll leave this to you. Perhaps you could put a comment in
>> net sse-os-support.h, why partial check is OK.
>
> I'll restrict the changes to sse{,2,3}-check.h since I cannot check
> anything else except for syntactic validity, but I've added an
> appropriate comment before sse_os_support ().
>
> Here's the patch I've come up with.  __get_cpuid () is now only used in
> gcc.dg/compat/vector-[12]b_main.c for AVX support.  Someone with the
> necessary hardware could change this to use dg-require-effective-target
> avx_runtime instead.

I will look at these.
BTW: There is no AVX hardware available yet, but you can play with
Intel SDE [1].

> A bootstrap on i386-pc-solaris2.10 with GNU as succeeded without
> regressions, so there are no syntax errors.  A i386-pc-solaris2.8
> bootstrap is still running.
>
> Ok for mainline and the branches if that passes?
>
> Thanks.
>        Rainer
>
>
> 2010-06-14  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
>
>        gcc:
>        * doc/sourcebuild.texi (Effective-Target Keywords): Document
>        sse_runtime, sse2_runtime.
>
>        gcc/testsuite:
>        * lib/target-supports.exp (check_sse_os_support_available): New
>        proc.
>        (check_sse_hw_available): New proc.
>        (check_effective_target_sse_runtime): New proc.
>        (check_effective_target_sse2_runtime): New proc.
>        * lib/fortran-torture.exp (get-fortran-torture-options): Only add
>        -msse2 if check_sse_os_support_available.
>        * g++.dg/vect/vect.exp: Only run -msse2 tests if
>        check_sse_os_support_available.
>        * gcc.dg/vect/vect.exp: Likewise.
>        * gfortran.dg/vect/vect.exp: Likewise.
>        * gcc.target/i386/sol2-check: Renamed to ...
>        * gcc.target/i386/sse-os-support.h: ... this.
>        (sol2_check): Renamed to ...
>        (sse_os_support): ... this.
>        Only test movss with xmm registers.
>        * gcc.target/i386/sse-check.h: Reflect new header and function names.
>        Removed ILL_INSN, ILL_INSN_LEN.
>        * gcc.target/i386/sse2-check.h: Likewise.
>        * gcc.target/i386/sse3-check.h: Likewise.
>        * gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime.
>        Removed cpuid.h, __get_cpuid test.
>        * g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime.
>        Removed cpuid.h, __get_cpuid test.
>        * g++.dg/other/pr40446.C: Likewise.
>        * gcc.dg/compat/union-m128-1_main.c: Likewise.
>        * gcc.dg/compat/vector-1a_main.c: Likewise.
>        * gcc.dg/compat/vector-2a_main.c: Likewise.
>        * gcc.dg/pr36584.c: Likewise.
>        * gcc.dg/pr37544.c: Likewise.
>        * gcc.dg/torture/pr16104-1.c: Likewise.
>        * gcc.dg/torture/stackalign/alloca-2.c: Likewise.
>        * gcc.dg/torture/stackalign/alloca-3.c: Likewise.
>        * gcc.dg/torture/stackalign/push-1.c: Likewise.
>        * gcc.dg/torture/stackalign/vararg-3.c: Likewise.
>        * gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test.
>        * gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target
>        sse2_runtime.
>        * gcc.dg/torture/pr35771-2.c: Likewise.
>        * gcc.dg/torture/pr35771-3.c: Likewise.
>        * gcc.target/i386/pr39315-2.c: Likewise.
>        * gcc.target/i386/pr39315-4.c: Likewise.
>        * gcc.target/i386/vperm-v2df.c: Likewise.
>        * gcc.target/i386/vperm-v2di.c: Likewise.
>        * gcc.target/i386/vperm-v4si-1.c: Likewise.
>        * gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target
>        sse_runtime.

This is OK for mainline SVN and branches.

[1] http://software.intel.com/en-us/articles/intel-software-development-emulator/

Thanks,
Uros.

Patch

diff -r 51761b4ff5af gcc/doc/sourcebuild.texi
--- a/gcc/doc/sourcebuild.texi	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/doc/sourcebuild.texi	Fri Jul 16 16:27:35 2010 +0200
@@ -1607,9 +1607,15 @@ 
 @item sse
 Target supports compiling @code{sse} instructions.
 
+@item sse_runtime
+Target supports the execution of @code{sse} instructions.
+
 @item sse2
 Target supports compiling @code{sse2} instructions.
 
+@item sse2_runtime
+Target supports the execution of @code{sse2} instructions.
+
 @item sync_char_short
 Target supports atomic operations on @code{char} and @code{short}.
 
diff -r 51761b4ff5af gcc/testsuite/g++.dg/other/i386-1.C
--- a/gcc/testsuite/g++.dg/other/i386-1.C	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/g++.dg/other/i386-1.C	Fri Jul 16 16:27:35 2010 +0200
@@ -1,11 +1,10 @@ 
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <xmmintrin.h>
 
-#include "cpuid.h"
-
 static void
 sse2_test (void)
 {
@@ -25,14 +24,6 @@ 
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    sse2_test ();
-
+  sse2_test ();
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/g++.dg/other/pr40446.C
--- a/gcc/testsuite/g++.dg/other/pr40446.C	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/g++.dg/other/pr40446.C	Fri Jul 16 16:27:35 2010 +0200
@@ -2,9 +2,9 @@ 
 // { dg-do run { target i?86-*-* x86_64-*-* } }
 // { dg-options "-O1 -msse2" }
 // { dg-require-effective-target sse2 }
+// { dg-require-effective-target sse2_runtime }
 
 #include <emmintrin.h>
-#include "cpuid.h"
 
 extern "C" void abort ();
 
@@ -34,14 +34,6 @@ 
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    sse2_test ();
-
+  sse2_test ();
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/g++.dg/vect/vect.exp
--- a/gcc/testsuite/g++.dg/vect/vect.exp	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/g++.dg/vect/vect.exp	Fri Jul 16 16:27:35 2010 +0200
@@ -79,7 +79,7 @@ 
 	return
     }
     lappend DEFAULT_VECTCFLAGS "-msse2"
-    if [check_sse2_hw_available] {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
 	set dg-do-what-default run
     } else {
 	set dg-do-what-default compile
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/compat/union-m128-1_main.c
--- a/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/compat/union-m128-1_main.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,8 +1,7 @@ 
 /* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
 /* { dg-options "-O" } */
 /* { dg-require-effective-target sse2 } */
-
-#include "cpuid.h"
+/* { dg-require-effective-target sse2_runtime } */
 
 /* Test function argument passing.  PR target/15301.  */
 
@@ -12,14 +11,6 @@ 
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE vector test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    union_m128_1_x ();
-
+  union_m128_1_x ();
   exit (0);
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/compat/vector-1a_main.c
--- a/gcc/testsuite/gcc.dg/compat/vector-1a_main.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/compat/vector-1a_main.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,12 +1,11 @@ 
 /* { dg-skip-if "test SSE2 vector" { ! { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 /* Test compatibility of vector types: layout between separately-compiled
    modules, parameter passing, and function return.  This test uses
    vectors of integer values.  */
 
-#include "cpuid.h"
-
 extern void vector_1_x (void);
 extern void exit (int);
 int fails;
@@ -14,14 +13,6 @@ 
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE vector test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    vector_1_x ();
-
+  vector_1_x ();
   exit (0);
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/compat/vector-2a_main.c
--- a/gcc/testsuite/gcc.dg/compat/vector-2a_main.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/compat/vector-2a_main.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,12 +1,11 @@ 
 /* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 /* Test compatibility of vector types: layout between separately-compiled
    modules, parameter passing, and function return.  This test uses
    vectors of floating points values.  */
 
-#include "cpuid.h"
-
 extern void vector_2_x (void);
 extern void exit (int);
 int fails;
@@ -14,14 +13,6 @@ 
 int
 main ()
 {
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE vector test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    vector_2_x ();
-
+  vector_2_x ();
   exit (0);
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/pr36584.c
--- a/gcc/testsuite/gcc.dg/pr36584.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/pr36584.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,10 +2,7 @@ 
 /* { dg-options "-O2 -lm" } */
 /* { dg-options "-O2 -msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-require-effective-target sse2 { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
-
-#ifdef __i386__
-#include "cpuid.h"
-#endif
+/* { dg-require-effective-target sse2_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 extern double fabs (double);
 extern void abort (void);
@@ -263,16 +260,6 @@ 
   double roots[7];
   int nroots;
 
-#ifdef __i386__
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  if (!(edx & bit_SSE2))
-    return 0;
-#endif
-
   nroots = sbisect (6, sseq, 0.0, 10000000.0, 5, 1, roots);
   if (nroots != 4)
     abort ();
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/pr37544.c
--- a/gcc/testsuite/gcc.dg/pr37544.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/pr37544.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,10 +2,7 @@ 
 /* { dg-options "-O2" } */
 /* { dg-options "-O2 -msse2 -mtune=core2 -mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */
-
-#ifdef __i386__
-#include "cpuid.h"
-#endif
+/* { dg-require-effective-target sse2_runtime { target { i?86-*-* x86_64-*-* } } } */
 
 extern void abort (void);
 
@@ -16,17 +13,6 @@ 
 
   int i;
 
-#ifdef __i386__
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (!(edx & bit_SSE2))
-    return 0;
-#endif
-
   for (i = 0; i < 1000; i++)
     arr[i] = 4294967296.0 + (double)i;
 
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/pr40550.c
--- a/gcc/testsuite/gcc.dg/pr40550.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/pr40550.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,10 +1,7 @@ 
 /* { dg-do run } */
 /* { dg-options "-msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
-
-#ifdef __i386__
-#include "cpuid.h"
-#endif
+/* { dg-require-effective-target sse_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 typedef float v2sf __attribute__ ((vector_size (2 * sizeof(float))));
 
@@ -18,18 +15,6 @@ 
 
 int main ()
 {
-
-#ifdef __i386__
-  unsigned int eax, ebx, ecx, edx;
-
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  if (!(edx & bit_SSE))
-    return 0;
-#endif
-
   test ();
-
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/pr16104-1.c
--- a/gcc/testsuite/gcc.dg/torture/pr16104-1.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/pr16104-1.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,8 +2,7 @@ 
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
-
-#include "cpuid.h"
+/* { dg-require-effective-target sse2_runtime } */
 
 extern void abort (void);
 
@@ -76,14 +75,6 @@ 
 int
 main (void)
 {
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    do_test ();
-
+  do_test ();
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/pr35771-1.c
--- a/gcc/testsuite/gcc.dg/torture/pr35771-1.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/pr35771-1.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,6 +1,7 @@ 
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
 
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/pr35771-2.c
--- a/gcc/testsuite/gcc.dg/torture/pr35771-2.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/pr35771-2.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,6 +1,7 @@ 
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__));
 
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/pr35771-3.c
--- a/gcc/testsuite/gcc.dg/torture/pr35771-3.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/pr35771-3.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,6 +1,7 @@ 
 /* { dg-do run { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
 
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/pr35771.h
--- a/gcc/testsuite/gcc.dg/torture/pr35771.h	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/pr35771.h	Fri Jul 16 16:27:35 2010 +0200
@@ -1,7 +1,5 @@ 
 typedef TYPE __attribute__((aligned(1))) unaligned;
 
-#include "cpuid.h"
-
 extern void abort (void);
 
 
@@ -27,14 +25,6 @@ 
 int
 main (void)
 {
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    do_test ();
-
+  do_test ();
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c
--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-2.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,9 +2,9 @@ 
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <emmintrin.h>
-#include "cpuid.h"
 #include "check.h"
 
 #ifndef ALIGNMENT
@@ -44,14 +44,7 @@ 
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    foo (x, x, x, 5);
+  foo (x, x, x, 5);
 
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c
--- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-3.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,9 +2,9 @@ 
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <emmintrin.h>
-#include "cpuid.h"
 #include "check.h"
 
 #ifndef ALIGNMENT
@@ -44,14 +44,7 @@ 
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
-
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    foo (x, x, x, x, 5);
+  foo (x, x, x, x, 5);
 
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/stackalign/push-1.c
--- a/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/push-1.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,9 +2,9 @@ 
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2 -mpreferred-stack-boundary=2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <emmintrin.h>
-#include "cpuid.h"
 
 typedef __PTRDIFF_TYPE__ ptrdiff_t;
 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
@@ -42,19 +42,11 @@ 
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
 
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    {
-      foo (x, x, x, x, 5);
+  foo (x, x, x, x, 5);
 
-      if (__builtin_memcmp (&r, &x, sizeof (r)))
-	abort ();
-    }
+  if (__builtin_memcmp (&r, &x, sizeof (r)))
+    abort ();
 
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c
--- a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-3.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,10 +2,10 @@ 
 /* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 /* { dg-options "-msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include <stdarg.h>
 #include <emmintrin.h>
-#include "cpuid.h"
 #include "check.h"
 
 #ifndef ALIGNMENT
@@ -72,14 +72,8 @@ 
 main (void)
 {
   __m128 x = { 1.0 };
-  unsigned int eax, ebx, ecx, edx;
- 
-  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-    return 0;
 
-  /* Run SSE2 test only if host has SSE2 support.  */
-  if (edx & bit_SSE2)
-    foo ("foo", 5, 5.0, x);
+  foo ("foo", 5, 5.0, x);
 
   return 0;
 }
diff -r 51761b4ff5af gcc/testsuite/gcc.dg/vect/vect.exp
--- a/gcc/testsuite/gcc.dg/vect/vect.exp	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.dg/vect/vect.exp	Fri Jul 16 16:27:35 2010 +0200
@@ -71,7 +71,7 @@ 
 	return
     }
     lappend DEFAULT_VECTCFLAGS "-msse2"
-    if [check_sse2_hw_available] {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
 	set dg-do-what-default run
     } else {
 	set dg-do-what-default compile
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/pr39315-2.c
--- a/gcc/testsuite/gcc.target/i386/pr39315-2.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/pr39315-2.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,6 +2,7 @@ 
 /* { dg-do run } */
 /* { dg-options "-O -msse2 -mtune=generic" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 /* { dg-additional-sources pr39315-check.c } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16)));
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/pr39315-4.c
--- a/gcc/testsuite/gcc.target/i386/pr39315-4.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/pr39315-4.c	Fri Jul 16 16:27:35 2010 +0200
@@ -2,6 +2,7 @@ 
 /* { dg-do run } */
 /* { dg-options "-O -msse2 -mtune=generic" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 /* { dg-additional-sources pr39315-check.c } */
 
 typedef float __m128 __attribute__ ((__vector_size__ (16)));
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/sol2-check.h
--- a/gcc/testsuite/gcc.target/i386/sol2-check.h	Thu Jul 15 19:49:33 2010 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,48 +0,0 @@ 
-#if defined(__sun__) && defined(__svr4__)
-/* Make sure sigaction() is declared even with -std=c99.  */
-#define __EXTENSIONS__
-#include <signal.h>
-#include <ucontext.h>
-
-static volatile sig_atomic_t sigill_caught;
-
-static void
-sigill_hdlr (int sig __attribute((unused)),
-	     siginfo_t *sip __attribute__((unused)),
-	     ucontext_t *ucp)
-{
-  sigill_caught = 1;
-  /* Set PC to the instruction after the faulting one to skip over it,
-     otherwise we enter an infinite loop.  */
-  ucp->uc_mcontext.gregs[EIP] += ILL_INSN_LEN;
-  setcontext (ucp);
-}
-#endif
-
-/* Solaris 2 before Solaris 9 4/04 cannot execute SSE/SSE2 instructions
-   even if the CPU supports them.  Programs receive SIGILL instead, so
-   check for that at runtime.  */
-static int
-sol2_check (void)
-{
-#if defined(__sun__) && defined(__svr4__)
-  struct sigaction act, oact;
-
-  act.sa_handler = sigill_hdlr;
-  sigemptyset (&act.sa_mask);
-  /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler.  */
-  act.sa_flags = SA_SIGINFO;
-  sigaction (SIGILL, &act, &oact);
-
-  ILL_INSN;
-
-  sigaction (SIGILL, &oact, NULL);
-
-  if (sigill_caught)
-    exit (0);
-  else
-    return 1;
-#else
-  return 1;
-#endif /* __sun__ && __svr4__ */
-}
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/sse-check.h
--- a/gcc/testsuite/gcc.target/i386/sse-check.h	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/sse-check.h	Fri Jul 16 16:27:35 2010 +0200
@@ -1,13 +1,7 @@ 
 #include <stdlib.h>
 #include "m128-check.h"
-
 #include "cpuid.h"
-
-/* We need a single SSE instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("movss %xmm2,%xmm1")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse_test (void);
 
@@ -27,7 +21,7 @@ 
     return 0;
 
   /* Run SSE test only if host has SSE support.  */
-  if ((edx & bit_SSE) && sol2_check ())
+  if ((edx & bit_SSE) && sse_os_support ())
     do_test ();
 
   return 0;
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/sse-os-support.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/gcc/testsuite/gcc.target/i386/sse-os-support.h	Fri Jul 16 16:27:35 2010 +0200
@@ -0,0 +1,55 @@ 
+#if defined(__sun__) && defined(__svr4__)
+/* Make sure sigaction() is declared even with -std=c99.  */
+#define __EXTENSIONS__
+#include <signal.h>
+#include <ucontext.h>
+
+static volatile sig_atomic_t sigill_caught;
+
+static void
+sigill_hdlr (int sig __attribute((unused)),
+	     siginfo_t *sip __attribute__((unused)),
+	     ucontext_t *ucp)
+{
+  sigill_caught = 1;
+  /* Set PC to the instruction after the faulting one to skip over it,
+     otherwise we enter an infinite loop.  */
+  ucp->uc_mcontext.gregs[EIP] += 4;
+  setcontext (ucp);
+}
+#endif
+
+/* Check if the OS supports executing SSE instructions.  This function is
+   only used in sse-check.h, sse2-check.h, and sse3-check.h so far since
+   Solaris 8 and 9 won't run on newer CPUs anyway.  */
+
+static int
+sse_os_support (void)
+{
+#if defined(__sun__) && defined(__svr4__)
+  /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions
+     even if the CPU supports them.  Programs receive SIGILL instead, so
+     check for that at runtime.  */
+
+  struct sigaction act, oact;
+
+  act.sa_handler = sigill_hdlr;
+  sigemptyset (&act.sa_mask);
+  /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler.  */
+  act.sa_flags = SA_SIGINFO;
+  sigaction (SIGILL, &act, &oact);
+
+  /* We need a single SSE instruction here so the handler can safely skip
+     over it.  */
+  __asm__ volatile ("movss %xmm2,%xmm1");
+
+  sigaction (SIGILL, &oact, NULL);
+
+  if (sigill_caught)
+    exit (0);
+  else
+    return 1;
+#else
+  return 1;
+#endif /* __sun__ && __svr4__ */
+}
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/sse2-check.h
--- a/gcc/testsuite/gcc.target/i386/sse2-check.h	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/sse2-check.h	Fri Jul 16 16:27:35 2010 +0200
@@ -1,12 +1,7 @@ 
 #include <stdlib.h>
 #include "cpuid.h"
 #include "m128-check.h"
-
-/* We need a single SSE2 instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("unpcklpd %xmm0,%xmm2")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse2_test (void);
 
@@ -26,7 +21,7 @@ 
     return 0;
 
   /* Run SSE2 test only if host has SSE2 support.  */
-  if ((edx & bit_SSE2) && sol2_check ())
+  if ((edx & bit_SSE2) && sse_os_support ())
     do_test ();
 
   return 0;
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/sse3-check.h
--- a/gcc/testsuite/gcc.target/i386/sse3-check.h	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/sse3-check.h	Fri Jul 16 16:27:35 2010 +0200
@@ -1,13 +1,7 @@ 
 #include <stdio.h>
 #include <stdlib.h>
-
 #include "cpuid.h"
-
-/* We need a single SSE3 instruction here so the handler can safely skip
-   over it.  */
-#define ILL_INSN __asm__ volatile ("movddup %xmm1,%xmm2")
-#define ILL_INSN_LEN 4
-#include "sol2-check.h"
+#include "sse-os-support.h"
 
 static void sse3_test (void);
 
@@ -27,7 +21,7 @@ 
     return 0;
  
   /* Run SSE3 test only if host has SSE3 support.  */
-  if ((ecx & bit_SSE3) && sol2_check ())
+  if ((ecx & bit_SSE3) && sse_os_support ())
     do_test ();
 
   return 0;
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/vperm-v2df.c
--- a/gcc/testsuite/gcc.target/i386/vperm-v2df.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/vperm-v2df.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,6 +1,7 @@ 
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/vperm-v2di.c
--- a/gcc/testsuite/gcc.target/i386/vperm-v2di.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/vperm-v2di.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,6 +1,7 @@ 
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c
--- a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,5 +1,7 @@ 
 /* { dg-do run } */
 /* { dg-options "-O -msse" } */
+/* { dg-require-effective-target sse } */
+/* { dg-require-effective-target sse_runtime } */
 
 #include "isa-check.h"
 
diff -r 51761b4ff5af gcc/testsuite/gcc.target/i386/vperm-v4si-1.c
--- a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c	Fri Jul 16 16:27:35 2010 +0200
@@ -1,6 +1,7 @@ 
 /* { dg-do run } */
 /* { dg-options "-O -msse2" } */
 /* { dg-require-effective-target sse2 } */
+/* { dg-require-effective-target sse2_runtime } */
 
 #include "isa-check.h"
 
diff -r 51761b4ff5af gcc/testsuite/gfortran.dg/vect/vect.exp
--- a/gcc/testsuite/gfortran.dg/vect/vect.exp	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/gfortran.dg/vect/vect.exp	Fri Jul 16 16:27:35 2010 +0200
@@ -72,7 +72,7 @@ 
 	return
     }
     lappend DEFAULT_VECTCFLAGS "-msse2"
-    if [check_sse2_hw_available] {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
 	set dg-do-what-default run
     } else {
 	set dg-do-what-default compile
diff -r 51761b4ff5af gcc/testsuite/lib/fortran-torture.exp
--- a/gcc/testsuite/lib/fortran-torture.exp	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/lib/fortran-torture.exp	Fri Jul 16 16:27:35 2010 +0200
@@ -46,7 +46,8 @@ 
 	set test_tree_vectorize 1
     } elseif { ( [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] )
 	       && [check_effective_target_sse2]
-	       && [check_sse2_hw_available] } {
+	       && [check_sse2_hw_available]
+	       && [check_sse_os_support_available] } {
 	lappend vectorizer_options "-msse2"
 	set test_tree_vectorize 1
     } elseif { [istarget "mips*-*-*"]
diff -r 51761b4ff5af gcc/testsuite/lib/target-supports.exp
--- a/gcc/testsuite/lib/target-supports.exp	Thu Jul 15 19:49:33 2010 +0200
+++ b/gcc/testsuite/lib/target-supports.exp	Fri Jul 16 16:27:35 2010 +0200
@@ -910,6 +910,53 @@ 
     }]
 }
 
+# Return 1 if the target OS supports running SSE executables, 0
+# otherwise.  Cache the result.
+
+proc check_sse_os_support_available { } {
+    return [check_cached_effective_target sse_os_support_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+	    expr 0
+	} elseif { [istarget i?86-*-solaris2*] } {
+	    # The Solaris 2 kernel doesn't save and restore SSE registers
+	    # before Solaris 9 4/04.  Before that, executables die with SIGILL.
+	    check_runtime_nocache sse_os_support_available {
+		int main ()
+		{
+		    __asm__ volatile ("movss %xmm2,%xmm1");
+		    return 0;
+		}
+	    } "-msse"
+	} else {
+	    expr 1
+	}
+    }]
+}
+
+# Return 1 if the target supports executing SSE instructions, 0
+# otherwise.  Cache the result.
+
+proc check_sse_hw_available { } {
+    return [check_cached_effective_target sse_hw_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+	    expr 0
+	} else {
+	    check_runtime_nocache sse_hw_available {
+		#include "cpuid.h"
+		int main ()
+		{
+		  unsigned int eax, ebx, ecx, edx = 0;
+		  if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+		    return !(edx & bit_SSE);
+		  return 1;
+		}
+	    } ""
+	}
+    }]
+}
+
 # Return 1 if the target supports executing SSE2 instructions, 0
 # otherwise.  Cache the result.
 
@@ -933,6 +980,26 @@ 
     }]
 }
 
+# Return 1 if the target supports running SSE executables, 0 otherwise.
+
+proc check_effective_target_sse_runtime { } {
+    if { [check_sse_hw_available] && [check_sse_os_support_available] } {
+	return 1
+    } else {
+	return 0
+    }
+}
+
+# Return 1 if the target supports running SSE2 executables, 0 otherwise.
+
+proc check_effective_target_sse2_runtime { } {
+    if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
+	return 1
+    } else {
+	return 0
+    }
+}
+
 # Return 1 if the target supports executing VSX instructions, 0
 # otherwise.  Cache the result.