@@ -22,7 +22,7 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
#define FILLBUF_SIZE 512
uint8_t fillbuf[FILLBUF_SIZE];
- int l;
+ size_t l;
bool error = false;
memset(fillbuf, c, FILLBUF_SIZE);
@@ -42,7 +42,8 @@
#endif
static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr,
- uint8_t *buf, int len, bool is_write)
+ uint8_t *buf, size_t len,
+ bool is_write)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
@@ -293,9 +293,9 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr,
}
void sparc_iommu_memory_rw(void *opaque, hwaddr addr,
- uint8_t *buf, int len, int is_write)
+ uint8_t *buf, size_t len, int is_write)
{
- int l;
+ size_t l;
uint32_t flags;
hwaddr page, phys_addr;
@@ -194,7 +194,7 @@ static void dp8393x_update_irq(dp8393xState *s)
static void dp8393x_do_load_cam(dp8393xState *s)
{
uint16_t data[8];
- int width, size;
+ size_t width, size;
uint16_t index = 0;
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
@@ -236,7 +236,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
static void dp8393x_do_read_rra(dp8393xState *s)
{
uint16_t data[8];
- int width, size;
+ size_t width, size;
/* Read memory */
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
@@ -347,8 +347,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
{
NetClientState *nc = qemu_get_queue(s->nic);
uint16_t data[12];
- int width, size;
- int tx_len, len;
+ size_t width, size;
+ size_t tx_len, len;
uint16_t i;
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
@@ -148,8 +148,8 @@ static void mcf_fec_do_tx(mcf_fec_state *s)
{
uint32_t addr;
mcf_fec_bd bd;
- int frame_size;
- int len;
+ size_t frame_size;
+ size_t len;
uint8_t frame[FEC_MAX_FRAME_SIZE];
uint8_t *ptr;