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[wwwdocs] Document 3 changes in GCC 6

Message ID 8186265.USun8IfHWT@polaris
State New
Headers show

Commit Message

Eric Botcazou Feb. 29, 2016, 10:36 a.m. UTC 
Hi,

this documents the following changes:
 - new scalar_storage_order type attribute in C,
 - ABI change for SPARC 64-bit,
 - automatic enabling of -mstackrealign with SSE for Windows 32-bit.

OK to apply?

Comments

Gerald Pfeifer March 1, 2016, 11:19 p.m. UTC | #1 
On Mon, 29 Feb 2016, Eric Botcazou wrote:
>  - new scalar_storage_order type attribute in C,
>  - ABI change for SPARC 64-bit,
>  - automatic enabling of -mstackrealign with SSE for Windows 32-bit.

+   <li>A new type attribute <code>scalar_storage_order</code> applying to
+       structures and unions has been introduced.  It makes it possible
+       to specify the storage order (aka endianness) in memory of scalar
+       fields in the structures or unions.</li>

How about saying "It specifies the storage order..."?

And "in structures and unions"?

+    <li>An ABI bug has been fixed in 64-bit mode. Unfortunately, this change
+    will break binary compatibility with earlier releases for code it affects,
+    but this should be pretty rare in practice.  The conditions are: a 16-byte
+    structure containing a <code>double</code> or a 8-byte vector in the second
+    half is passed in slot #15 to a subprogram, for example as 16th parameter
+    if the first 15 ones have at most 8 bytes.  The <code>double</code> or
+    vector was wrongly passed in floating-point register <code>%d32</code>
+    in lieu of on the stack as per the SPARC calling conventions.</li>

That really must occur super, super rarely. ;-)

How about "...is passed to a subprogram in slot #15..."?


Okay with the changes above.  Thanks for taking the time to 
document these!

Gerald
Eric Botcazou March 1, 2016, 11:28 p.m. UTC | #2 
> How about saying "It specifies the storage order..."?
> 
> And "in structures and unions"?

OK.

> How about "...is passed to a subprogram in slot #15..."?

OK.

> Okay with the changes above.

Thanks!
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Patch

Index: htdocs/gcc-6/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retrieving revision 1.64
diff -u -r1.64 changes.html
--- htdocs/gcc-6/changes.html	26 Feb 2016 14:51:16 -0000	1.64
+++ htdocs/gcc-6/changes.html	29 Feb 2016 10:34:04 -0000
@@ -78,7 +78,7 @@ 
 	  with <code>char</code> in all cases because it is an array while
 	  <code>char</code> is scalar.
 	  <code>INTEGER(KIND=C_SIGNED_CHAR)</code> should be used instead.
-	  In general, this inter-operability can not be implemented, for
+	  In general, this inter-operability cannot be implemented, for
 	  example, on targets where function passing conventions of arrays
 	  differs from scalars.</p></li>
       <li>More type information is now preserved at link time reducing
@@ -223,6 +223,10 @@ 
 	a structure or a union with side effects is being overridden when
 	using designated initializers via a new warning option
 	<code>-Woverride-init-side-effects</code>.</li>
+   <li>A new type attribute <code>scalar_storage_order</code> applying to
+       structures and unions has been introduced.  It makes it possible
+       to specify the storage order (aka endianness) in memory of scalar
+       fields in the structures or unions.</li>
   </ul>
 
 <h3 id="cxx">C++</h3>
@@ -605,6 +609,18 @@ 
     configure option.</li>
   </ul>
 
+<h3 id="sparc">SPARC</h3>
+  <ul>
+    <li>An ABI bug has been fixed in 64-bit mode. Unfortunately, this change
+    will break binary compatibility with earlier releases for code it affects,
+    but this should be pretty rare in practice.  The conditions are: a 16-byte
+    structure containing a <code>double</code> or a 8-byte vector in the second
+    half is passed in slot #15 to a subprogram, for example as 16th parameter
+    if the first 15 ones have at most 8 bytes.  The <code>double</code> or
+    vector was wrongly passed in floating-point register <code>%d32</code>
+    in lieu of on the stack as per the SPARC calling conventions.</li>
+  </ul>
+
 <!-- .................................................................. -->
 <h2 id="os">Operating Systems</h2>
 
@@ -637,6 +653,11 @@ 
     capabilities.</li>
   </ul>
 
+<h3 id="windows">Windows</h3>
+  <ul>
+   <li>The option <code>-mstackrealign</code> is now automatically activated
+   in 32-bit mode whenever the use of SSE instructions is requested.</li>
+  </ul>
 <!-- <h3 id="vxmils">VxWorks MILS</h3> -->