From patchwork Thu Jul 15 06:18:23 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Fisher X-Patchwork-Id: 58965 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id A7A8BB6EFE for ; Thu, 15 Jul 2010 16:18:59 +1000 (EST) Received: (qmail 7067 invoked by alias); 15 Jul 2010 06:18:56 -0000 Received: (qmail 7057 invoked by uid 22791); 15 Jul 2010 06:18:55 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE X-Spam-Check-By: sourceware.org Received: from mail-qw0-f47.google.com (HELO mail-qw0-f47.google.com) (209.85.216.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 15 Jul 2010 06:18:50 +0000 Received: by qwg8 with SMTP id 8so126726qwg.20 for ; Wed, 14 Jul 2010 23:18:48 -0700 (PDT) Received: by 10.224.79.151 with SMTP id p23mr2974237qak.312.1279174725901; Wed, 14 Jul 2010 23:18:45 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.91.17 with HTTP; Wed, 14 Jul 2010 23:18:23 -0700 (PDT) In-Reply-To: <87eif76ud2.fsf@firetop.home> References: <87bpafjsxq.fsf@firetop.home> <87r5j8a4m0.fsf@firetop.home> <87eif76ud2.fsf@firetop.home> From: Eric Fisher Date: Thu, 15 Jul 2010 14:18:23 +0800 Message-ID: Subject: Re: [vect] Ask for review and approving the patch about vect and loongson To: Eric Fisher , Richard Guenther , gcc-patches , rdsandiford@googlemail.com Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org 2010/7/14 Richard Sandiford : > Watch the formatting: the (match_operand: ...)s should line up vertically. Thanks. I've updated the patch. > This could in theory cause us to miscompile things like: > > v2hi >> (shift & 15) > > and although I can't come up with a testcase, I think the problem > is still there. > > Admittedly this means the current code is wrong too. It should be > using UNSPECs instead of shift rtxes. > > One fix would be to make SHIFT_COUNT_TRUNCATED take a mode argument > (and turn it into a target hook at the same time). > Richard, you're right. I can produce this problem with a testcase now. Eric Index: config/mips/loongson.md =================================================================== --- config/mips/loongson.md (revision 162124) +++ config/mips/loongson.md (working copy) @@ -31,7 +31,6 @@ UNSPEC_LOONGSON_PMOVMSK UNSPEC_LOONGSON_PMULHU UNSPEC_LOONGSON_PMULH - UNSPEC_LOONGSON_PMULL UNSPEC_LOONGSON_PMULU UNSPEC_LOONGSON_PASUBUB UNSPEC_LOONGSON_BIADD @@ -353,11 +352,10 @@ [(set_attr "type" "fmul")]) ;; Multiply signed integers and store low result. -(define_insn "loongson_pmull" +(define_insn "mul3" [(set (match_operand:VH 0 "register_operand" "=f") - (unspec:VH [(match_operand:VH 1 "register_operand" "f") - (match_operand:VH 2 "register_operand" "f")] - UNSPEC_LOONGSON_PMULL))] + (mult:VH (match_operand:VH 1 "register_operand" "f") + (match_operand:VH 2 "register_operand" "f")))] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" "pmull\t%0,%1,%2" [(set_attr "type" "fmul")])