From patchwork Thu Jul 15 06:18:23 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [vect] Ask for review and approving the patch about vect and loongson Date: Wed, 14 Jul 2010 20:18:23 -0000 From: Eric Fisher X-Patchwork-Id: 58965 Message-Id: To: Eric Fisher , Richard Guenther , gcc-patches , rdsandiford@googlemail.com 2010/7/14 Richard Sandiford : > Watch the formatting: the (match_operand: ...)s should line up vertically. Thanks. I've updated the patch. > This could in theory cause us to miscompile things like: > > v2hi >> (shift & 15) > > and although I can't come up with a testcase, I think the problem > is still there. > > Admittedly this means the current code is wrong too. It should be > using UNSPECs instead of shift rtxes. > > One fix would be to make SHIFT_COUNT_TRUNCATED take a mode argument > (and turn it into a target hook at the same time). > Richard, you're right. I can produce this problem with a testcase now. Eric Index: config/mips/loongson.md =================================================================== --- config/mips/loongson.md (revision 162124) +++ config/mips/loongson.md (working copy) @@ -31,7 +31,6 @@ UNSPEC_LOONGSON_PMOVMSK UNSPEC_LOONGSON_PMULHU UNSPEC_LOONGSON_PMULH - UNSPEC_LOONGSON_PMULL UNSPEC_LOONGSON_PMULU UNSPEC_LOONGSON_PASUBUB UNSPEC_LOONGSON_BIADD @@ -353,11 +352,10 @@ [(set_attr "type" "fmul")]) ;; Multiply signed integers and store low result. -(define_insn "loongson_pmull" +(define_insn "mul3" [(set (match_operand:VH 0 "register_operand" "=f") - (unspec:VH [(match_operand:VH 1 "register_operand" "f") - (match_operand:VH 2 "register_operand" "f")] - UNSPEC_LOONGSON_PMULL))] + (mult:VH (match_operand:VH 1 "register_operand" "f") + (match_operand:VH 2 "register_operand" "f")))] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" "pmull\t%0,%1,%2" [(set_attr "type" "fmul")])