@@ -19,6 +19,7 @@
#include <asm/arch/periph.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/hi6220.h>
+#include <asm/armv8/mmu.h>
/*TODO drop this table in favour of device tree */
static const struct hikey_gpio_platdata hi6220_gpio[] = {
@@ -87,6 +88,26 @@ U_BOOT_DEVICE(hikey_seriala) = {
.platdata = &serial_platdata,
};
+static struct mm_region hikey_mem_map[] = {
+ {
+ .base = 0x0UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ .base = 0x80000000UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = hikey_mem_map;
+
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_uart_init(void)
{
@@ -21,8 +21,9 @@
#define CONFIG_SUPPORT_RAW_INITRD
-/* Cache Definitions */
-#define CONFIG_SYS_DCACHE_OFF
+/* MMU Definitions */
+#define CONFIG_SYS_CACHELINE_SIZE 64
+#define CONFIG_SYS_FULL_VA
#define CONFIG_IDENT_STRING "hikey"
The hikey runs with dcache disabled today. There really should be no reason not to use caches on AArch64, so let's add MMU definitions and enable the dcache. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - Move tables to .c file --- board/hisilicon/hikey/hikey.c | 21 +++++++++++++++++++++ include/configs/hikey.h | 5 +++-- 2 files changed, 24 insertions(+), 2 deletions(-)