[ARM] Add initial support for the Cortex-A32

Hi all,

This patch adds initial support for the Cortex-A32 core.
It is an ARMv8-A core and this patch enables the -mcpu=cortex-a32 and
-mtune=cortex-a32 options.

The initial tunings are set to the same parameters as for Cortex-A35.

Bootstrapped and tested on arm-none-linux-gnueabihf together with a binutils
suitably patched to recognise -mcpu=cortex-a32 and the respective .cpu directive
(https://sourceware.org/ml/binutils/2016-02/msg00345.html)
The build was configured with --with-cpu=cortex-a32 --with-mode=thumb --with-fpu=neon-fp-armv8 --with-float=hard

Ok for trunk?

Thanks,
Kyrill

2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * config/arm/arm-cores.def (cortex-a32): New entry.
     * config/arm/arm-tables.opt: Regenerate.
     * config/arm/arm-tune.md: Regenerate.
     * config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a32.
     * config/arm/t-aprofile: Handle mcpu=cortex-a32.
     * doc/invoke.texi (ARM Options): Document cortex-a32 as value
     for -mcpu and -mtune.

On 24/02/16 10:49, Kyrill Tkachov wrote:
> Hi all,
> 
> This patch adds initial support for the Cortex-A32 core.
> It is an ARMv8-A core and this patch enables the -mcpu=cortex-a32 and
> -mtune=cortex-a32 options.
> 
> The initial tunings are set to the same parameters as for Cortex-A35.
> 
> Bootstrapped and tested on arm-none-linux-gnueabihf together with a
> binutils
> suitably patched to recognise -mcpu=cortex-a32 and the respective .cpu
> directive
> (https://sourceware.org/ml/binutils/2016-02/msg00345.html)
> The build was configured with --with-cpu=cortex-a32 --with-mode=thumb
> --with-fpu=neon-fp-armv8 --with-float=hard
> 
> Ok for trunk?
> 
> Thanks,
> Kyrill
> 
> 2016-02-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> 
>     * config/arm/arm-cores.def (cortex-a32): New entry.
>     * config/arm/arm-tables.opt: Regenerate.
>     * config/arm/arm-tune.md: Regenerate.
>     * config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a32.
>     * config/arm/t-aprofile: Handle mcpu=cortex-a32.
>     * doc/invoke.texi (ARM Options): Document cortex-a32 as value
>     for -mcpu and -mtune.
> 

OK.

R.

> cortex-a32-gcc.patch
> 
> 
> diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
> index 6538861898689e64a3554f709c5a3355cffad187..b61b7f82b68d3b1f42ee5e22b537fb69392ce337 100644
> --- a/gcc/config/arm/arm-cores.def
> +++ b/gcc/config/arm/arm-cores.def
> @@ -165,6 +165,7 @@ ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7,	7A,	ARM_FSET_MAKE_
>  ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7,	7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12)
>  
>  /* V8 Architecture Processors */
> +ARM_CORE("cortex-a32",	cortexa32, cortexa53,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35)
>  ARM_CORE("cortex-a35",	cortexa35, cortexa53,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35)
>  ARM_CORE("cortex-a53",	cortexa53, cortexa53,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a53)
>  ARM_CORE("cortex-a57",	cortexa57, cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
> diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
> index 6d6ee96828146fe076a6a1ee285f6a1d578b6c85..4b7522cb7afd189dc7edda1bb824b3ae509756b4 100644
> --- a/gcc/config/arm/arm-tables.opt
> +++ b/gcc/config/arm/arm-tables.opt
> @@ -304,6 +304,9 @@ EnumValue
>  Enum(processor_type) String(cortex-a17.cortex-a7) Value(cortexa17cortexa7)
>  
>  EnumValue
> +Enum(processor_type) String(cortex-a32) Value(cortexa32)
> +
> +EnumValue
>  Enum(processor_type) String(cortex-a35) Value(cortexa35)
>  
>  EnumValue
> diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
> index 1c842180cee6afd7a560ef51b63632bb0f83b932..b66344a838e0579ea687dabc4e4b6343f16705ad 100644
> --- a/gcc/config/arm/arm-tune.md
> +++ b/gcc/config/arm/arm-tune.md
> @@ -32,7 +32,8 @@ (define_attr "tune"
>  	cortexr4f,cortexr5,cortexr7,
>  	cortexm7,cortexm4,cortexm3,
>  	marvell_pj4,cortexa15cortexa7,cortexa17cortexa7,
> -	cortexa35,cortexa53,cortexa57,
> -	cortexa72,exynosm1,qdf24xx,
> -	xgene1,cortexa57cortexa53,cortexa72cortexa53"
> +	cortexa32,cortexa35,cortexa53,
> +	cortexa57,cortexa72,exynosm1,
> +	qdf24xx,xgene1,cortexa57cortexa53,
> +	cortexa72cortexa53"
>  	(const (symbol_ref "((enum attr_tune) arm_tune)")))
> diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
> index 82128ef0735bb4b223908b2393a46d97e020156b..5d6c4ed51eac2d136871b52d87faefc2ebaa4a43 100644
> --- a/gcc/config/arm/bpabi.h
> +++ b/gcc/config/arm/bpabi.h
> @@ -68,6 +68,7 @@
>     |mcpu=cortex-a15.cortex-a7				\
>     |mcpu=cortex-a17.cortex-a7				\
>     |mcpu=marvell-pj4					\
> +   |mcpu=cortex-a32					\
>     |mcpu=cortex-a35					\
>     |mcpu=cortex-a53					\
>     |mcpu=cortex-a57					\
> diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile
> index 609570643cab23ff699d48a0ea0ee3f991b71c85..b0ecc2fe45da581b6f1cf1a3e1aea7d428c0e533 100644
> --- a/gcc/config/arm/t-aprofile
> +++ b/gcc/config/arm/t-aprofile
> @@ -86,6 +86,7 @@ MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a12
>  MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a17
>  MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a15.cortex-a7
>  MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a17.cortex-a7
> +MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a32
>  MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a35
>  MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a53
>  MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a57
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 0a2a6f45d7cf916a84dc48b6885cf04d43b12d8a..e6b52b4a4b59cbda59b3a8fc25e9bab2f25934c5 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -13874,8 +13874,8 @@ Permissible names are: @samp{arm2}, @samp{arm250},
>  @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
>  @samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8},
>  @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17},
> -@samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72},
> -@samp{cortex-r4},
> +@samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
> +@samp{cortex-a72}, @samp{cortex-r4},
>  @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m7},
>  @samp{cortex-m4},
>  @samp{cortex-m3},
>