From patchwork Tue Jul 13 03:55:13 2010
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Subject: [vect] Ask for review and approving the patch about vect and loongson
Date: Mon, 12 Jul 2010 17:55:13 -0000
From: Eric Fisher <joefoxreal@gmail.com>
X-Patchwork-Id: 58702
Message-Id: <AANLkTilN8XMMptGuEaw6q8_Kr-0_dIolJQHroCpEm-NA@mail.gmail.com>
To: Eric Fisher <joefoxreal@gmail.com>,
 Richard Guenther <richard.guenther@gmail.com>,
 gcc-patches <gcc-patches@gcc.gnu.org>, rdsandiford@googlemail.com

2010/7/13 Richard Sandiford <rdsandiford@googlemail.com>:
>>> As far as loongson.patch goes:
>>>
>>> Index: config/mips/loongson.md
>>> ===================================================================
>>> --- config/mips/loongson.md     (revision 161865)
>>> +++ config/mips/loongson.md     (working copy)
>>> @@ -352,6 +352,16 @@
>>>   "pmulh<V_suffix>\t%0,%1,%2"
>>>   [(set_attr "type" "fmul")])
>>>
>>> +;; Standard pattern mulm3
>>> +(define_expand "mul<mode>3"
>>> +  [(set (match_operand:VH 0 "register_operand" "=f")
>>> +        (unspec:VH [(match_operand:VH 1 "register_operand" "f")
>>> +                    (match_operand:VH 2 "register_operand" "f")]
>>> +                   UNSPEC_LOONGSON_PMULL))]
>>> +  "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
>>> +  "")
>>> +
>>> +
>>>  ;; Multiply signed integers and store low result.
>>>  (define_insn "loongson_pmull<V_suffix>"
>>>   [(set (match_operand:VH 0 "register_operand" "=f")
>>>
>>> Instead rename loongson_pmull<V_suffix> to mul<mode>3 and add #defines
>>> to mips.c to make CODE_FOR_loongson_pmullh an alias for CODE_FOR_mulhi3,
>>> etc.  Grep for CODE_FOR_loongson to see where I mean.
>>
>> Thanks for the helpful information. I've changed the patch in the attachment.
>
> Sorry, I forgot to ask you to change the pattern from an UNSPEC to
> a MULT at the same time.  The multiplication part is OK with that fixed.

Thanks. I've updated the patch in the attachment.

BTW, I still don't have svn write access and copyright assignment. :(

Regards,
Eric


Index: config/mips/loongson.md
===================================================================
--- config/mips/loongson.md	(revision 162065)
+++ config/mips/loongson.md	(working copy)
@@ -31,7 +31,6 @@
   UNSPEC_LOONGSON_PMOVMSK
   UNSPEC_LOONGSON_PMULHU
   UNSPEC_LOONGSON_PMULH
-  UNSPEC_LOONGSON_PMULL
   UNSPEC_LOONGSON_PMULU
   UNSPEC_LOONGSON_PASUBUB
   UNSPEC_LOONGSON_BIADD
@@ -353,11 +352,10 @@
   [(set_attr "type" "fmul")])
 
 ;; Multiply signed integers and store low result.
-(define_insn "loongson_pmull<V_suffix>"
+(define_insn "mul<mode>3"
   [(set (match_operand:VH 0 "register_operand" "=f")
-        (unspec:VH [(match_operand:VH 1 "register_operand" "f")
-		    (match_operand:VH 2 "register_operand" "f")]
-		   UNSPEC_LOONGSON_PMULL))]
+        (mult:VH (match_operand:VH 1 "register_operand" "f")
+		    (match_operand:VH 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "pmull<V_suffix>\t%0,%1,%2"
   [(set_attr "type" "fmul")])
Index: config/mips/mips.c
===================================================================
--- config/mips/mips.c	(revision 162065)
+++ config/mips/mips.c	(working copy)
@@ -12667,6 +12667,7 @@ AVAIL_NON_MIPS16 (cache, TARGET_CACHE_BU
 #define CODE_FOR_loongson_pminub CODE_FOR_uminv8qi3
 #define CODE_FOR_loongson_pmulhuh CODE_FOR_umulv4hi3_highpart
 #define CODE_FOR_loongson_pmulhh CODE_FOR_smulv4hi3_highpart
+#define CODE_FOR_loongson_pmullh CODE_FOR_mulv4hi3
 #define CODE_FOR_loongson_psubw CODE_FOR_subv2si3
 #define CODE_FOR_loongson_psubh CODE_FOR_subv4hi3
 #define CODE_FOR_loongson_psubb CODE_FOR_subv8qi3