From patchwork Mon Jul 12 09:04:49 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dong, Chuanxiao" X-Patchwork-Id: 58601 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 98492B6EF2 for ; Mon, 12 Jul 2010 22:12:37 +1000 (EST) Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.72 #1 (Red Hat Linux)) id 1OYHqX-0000l8-Ef; Mon, 12 Jul 2010 12:10:53 +0000 Received: from mga09.intel.com ([134.134.136.24]) by bombadil.infradead.org with esmtp (Exim 4.72 #1 (Red Hat Linux)) id 1OYHqR-0000js-Ri for linux-mtd@lists.infradead.org; Mon, 12 Jul 2010 12:10:48 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 12 Jul 2010 02:04:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.55,187,1278313200"; d="scan'208,223";a="534515485" Received: from pgsmsx602.gar.corp.intel.com ([10.221.43.81]) by orsmga002.jf.intel.com with ESMTP; 12 Jul 2010 02:05:48 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.239.4.112) by pgsmsx602.gar.corp.intel.com (10.221.43.81) with Microsoft SMTP Server (TLS) id 8.2.176.0; Mon, 12 Jul 2010 17:04:52 +0800 Received: from shsmsx502.ccr.corp.intel.com ([10.239.4.96]) by shsmsx601.ccr.corp.intel.com ([10.239.4.112]) with mapi; Mon, 12 Jul 2010 17:04:52 +0800 From: "Dong, Chuanxiao" To: "Woodhouse, David" , "linux-mtd@lists.infradead.org" Date: Mon, 12 Jul 2010 17:04:49 +0800 Subject: [PATCH 5/5]mtd/nand/denali.c: remove set_ecc_config functions Thread-Topic: [PATCH 5/5]mtd/nand/denali.c: remove set_ecc_config functions Thread-Index: AcshoUh8fQlPHdRhQ/C331Xrp5jXUA== Message-ID: <5D8008F58939784290FAB48F549751981D09B718B7@shsmsx502.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20100712_081048_157883_D71CBC3C X-CRM114-Status: GOOD ( 12.73 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [134.134.136.24 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: "Dong, Chuanxiao" , "Gao, Yunpeng" , "Yuan, Hang" X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From 399e22e9f1bc32558961391db377309b08806b25 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Mon, 21 Jun 2010 18:51:19 +0800 Subject: [PATCH 5/5] [MTD/denali] remove set_ecc_config This function only need to set ECC_CORRECTION reg so remove it and set this reg in probe function. For denali nand controller only support 15bits and 8bits ecc correction on MRST, here use 15bits ecc correction for MLC NAND and 8bits ecc correction for SLC NAND. Signed-off-by: Chuanxiao Dong --- drivers/mtd/nand/denali.c | 44 ++------------------------------------------ 1 files changed, 2 insertions(+), 42 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 1555921..d143b0b 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -354,46 +354,6 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali, denali_write32(cs_cnt, denali->flash_reg + CS_SETUP_CNT); } -/* configures the initial ECC settings for the controller */ -static void set_ecc_config(struct denali_nand_info *denali) -{ -#if SUPPORT_8BITECC - if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) < 4096) || - (ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) <= 128)) - denali_write32(8, denali->flash_reg + ECC_CORRECTION); -#endif - - if ((ioread32(denali->flash_reg + ECC_CORRECTION) & - ECC_CORRECTION__VALUE) == 1) { - denali->dev_info.wECCBytesPerSector = 4; - denali->dev_info.wECCBytesPerSector *= - denali->dev_info.wDevicesConnected; - denali->dev_info.wNumPageSpareFlag = - denali->dev_info.wPageSpareSize - - denali->dev_info.wPageDataSize / - (ECC_SECTOR_SIZE * denali->dev_info.wDevicesConnected) * - denali->dev_info.wECCBytesPerSector - - denali->dev_info.wSpareSkipBytes; - } else { - denali->dev_info.wECCBytesPerSector = - (ioread32(denali->flash_reg + ECC_CORRECTION) & - ECC_CORRECTION__VALUE) * 13 / 8; - if ((denali->dev_info.wECCBytesPerSector) % 2 == 0) - denali->dev_info.wECCBytesPerSector += 2; - else - denali->dev_info.wECCBytesPerSector += 1; - - denali->dev_info.wECCBytesPerSector *= - denali->dev_info.wDevicesConnected; - denali->dev_info.wNumPageSpareFlag = - denali->dev_info.wPageSpareSize - - denali->dev_info.wPageDataSize / - (ECC_SECTOR_SIZE * denali->dev_info.wDevicesConnected) * - denali->dev_info.wECCBytesPerSector - - denali->dev_info.wSpareSkipBytes; - } -} - /* queries the NAND device to see what ONFI modes it supports. */ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) { @@ -900,8 +860,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) denali->dev_info.nBitsInBlockDataSize = ilog2(denali->dev_info.wBlockDataSize); - set_ecc_config(denali); - no_of_planes = ioread32(denali->flash_reg + NUMBER_OF_PLANES) & NUMBER_OF_PLANES__VALUE; @@ -2075,9 +2033,11 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) if (denali->dev_info.MLCDevice) { denali->nand.ecc.layout = &nand_oob_mlc_14bit; denali->nand.ecc.bytes = ECC_BYTES_MLC; + denali_write32(15, denali->flash_reg + ECC_CORRECTION); } else { /* SLC */ denali->nand.ecc.layout = &nand_oob_slc; denali->nand.ecc.bytes = ECC_BYTES_SLC; + denali_write32(8, denali->flash_reg + ECC_CORRECTION); } /* These functions are required by the NAND core framework, otherwise,