From patchwork Sun Jul 11 18:09:36 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 58534 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 79087B6F18 for ; Mon, 12 Jul 2010 04:16:20 +1000 (EST) Received: from localhost ([127.0.0.1]:55619 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OY14b-00082x-FC for incoming@patchwork.ozlabs.org; Sun, 11 Jul 2010 14:16:17 -0400 Received: from [140.186.70.92] (port=45784 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OY0yC-0003th-Mw for qemu-devel@nongnu.org; Sun, 11 Jul 2010 14:09:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OY0yB-0006NQ-8U for qemu-devel@nongnu.org; Sun, 11 Jul 2010 14:09:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58276) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OY0yB-0006NE-0P for qemu-devel@nongnu.org; Sun, 11 Jul 2010 14:09:39 -0400 Received: from int-mx04.intmail.prod.int.phx2.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.17]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o6BI9bx5001752 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sun, 11 Jul 2010 14:09:37 -0400 Received: from localhost6.localdomain6 (ovpn01.gateway.prod.ext.phx2.redhat.com [10.5.9.1]) by int-mx04.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o6BI9aL3032205; Sun, 11 Jul 2010 14:09:36 -0400 From: Alex Williamson To: kvm@vger.kernel.org, qemu-devel@nongnu.org Date: Sun, 11 Jul 2010 12:09:36 -0600 Message-ID: <20100711180936.20121.35376.stgit@localhost6.localdomain6> In-Reply-To: <20100711180910.20121.93313.stgit@localhost6.localdomain6> References: <20100711180910.20121.93313.stgit@localhost6.localdomain6> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.67 on 10.5.11.17 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. Cc: chrisw@redhat.com, alex.williamson@redhat.com, pugs@cisco.com, mst@redhat.com Subject: [Qemu-devel] [RFC PATCH 4/5] APIC/IOAPIC EOI callback X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org For device assignment, we need to know when the VM writes an end of interrupt to the APIC, which allows us to de-assert the interrupt line and clear the DisINTx bit. Add a new wrapper for ioapic generated interrupts with a callback on eoi and create an interface for drivers to be notified on eoi. Signed-off-by: Alex Williamson --- hw/apic.c | 18 ++++++++++++++++-- hw/apic.h | 4 ++++ hw/ioapic.c | 29 +++++++++++++++++++++++++++-- hw/pc.h | 12 +++++++++++- 4 files changed, 58 insertions(+), 5 deletions(-) diff --git a/hw/apic.c b/hw/apic.c index d686b51..8f512df 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -21,6 +21,7 @@ #include "qemu-timer.h" #include "host-utils.h" #include "sysbus.h" +#include "pc.h" //#define DEBUG_APIC //#define DEBUG_COALESCING @@ -119,6 +120,7 @@ struct APICState { int wait_for_sipi; }; +static uint8_t vector_to_gsi_map[256] = { 0xff }; static APICState *local_apics[MAX_APICS + 1]; static int apic_irq_delivered; @@ -308,6 +310,15 @@ void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, trigger_mode); } +void apic_deliver_ioapic_irq(uint8_t dest, uint8_t dest_mode, + uint8_t delivery_mode, uint8_t vector_num, + uint8_t polarity, uint8_t trigger_mode, int gsi) +{ + vector_to_gsi_map[vector_num] = gsi; + apic_deliver_irq(dest, dest_mode, delivery_mode, + vector_num, polarity, trigger_mode); +} + void cpu_set_apic_base(DeviceState *d, uint64_t val) { APICState *s = DO_UPCAST(APICState, busdev.qdev, d); @@ -432,8 +443,11 @@ static void apic_eoi(APICState *s) if (isrv < 0) return; reset_bit(s->isr, isrv); - /* XXX: send the EOI packet to the APIC bus to allow the I/O APIC to - set the remote IRR bit for level triggered interrupts. */ + + if (vector_to_gsi_map[isrv] != 0xff) { + ioapic_eoi(vector_to_gsi_map[isrv]); + vector_to_gsi_map[isrv] = 0xff; + } apic_update_irq(s); } diff --git a/hw/apic.h b/hw/apic.h index 8a0c9d0..59d0e37 100644 --- a/hw/apic.h +++ b/hw/apic.h @@ -8,6 +8,10 @@ void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode); +void apic_deliver_ioapic_irq(uint8_t dest, uint8_t dest_mode, + uint8_t delivery_mode, + uint8_t vector_num, uint8_t polarity, + uint8_t trigger_mode, int gsi); int apic_accept_pic_intr(DeviceState *s); void apic_deliver_pic_intr(DeviceState *s, int level); int apic_get_interrupt(DeviceState *s); diff --git a/hw/ioapic.c b/hw/ioapic.c index 5ae21e9..1e2fc2e 100644 --- a/hw/ioapic.c +++ b/hw/ioapic.c @@ -26,6 +26,7 @@ #include "qemu-timer.h" #include "host-utils.h" #include "sysbus.h" +#include "qlist.h" //#define DEBUG_IOAPIC @@ -61,6 +62,30 @@ struct IOAPICState { uint64_t ioredtbl[IOAPIC_NUM_PINS]; }; +static QLIST_HEAD(ioapic_eoi_client_list, + ioapic_eoi_client) ioapic_eoi_client_list = + QLIST_HEAD_INITIALIZER(ioapic_eoi_client_list); + +void ioapic_register_eoi_client(ioapic_eoi_client *client) +{ + QLIST_INSERT_HEAD(&ioapic_eoi_client_list, client, list); +} + +void ioapic_unregister_eoi_client(ioapic_eoi_client *client) +{ + QLIST_REMOVE(client, list); +} + +void ioapic_eoi(int gsi) +{ + ioapic_eoi_client *client; + QLIST_FOREACH(client, &ioapic_eoi_client_list, list) { + if (client->irq == gsi) { + client->eoi(client); + } + } +} + static void ioapic_service(IOAPICState *s) { uint8_t i; @@ -90,8 +115,8 @@ static void ioapic_service(IOAPICState *s) else vector = entry & 0xff; - apic_deliver_irq(dest, dest_mode, delivery_mode, - vector, polarity, trig_mode); + apic_deliver_ioapic_irq(dest, dest_mode, delivery_mode, + vector, polarity, trig_mode, i); } } } diff --git a/hw/pc.h b/hw/pc.h index 63b0249..a88019f 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -48,8 +48,18 @@ typedef struct isa_irq_state { void isa_irq_handler(void *opaque, int n, int level); -/* i8254.c */ +struct ioapic_eoi_client; +typedef struct ioapic_eoi_client ioapic_eoi_client; +struct ioapic_eoi_client { + void (*eoi)(struct ioapic_eoi_client *client); + int irq; + QLIST_ENTRY(ioapic_eoi_client) list; +}; +void ioapic_register_eoi_client(ioapic_eoi_client *client); +void ioapic_unregister_eoi_client(ioapic_eoi_client *client); +void ioapic_eoi(int gsi); +/* i8254.c */ #define PIT_FREQ 1193182 typedef struct PITState PITState;