Message ID | 56C53059.4020505@electromag.com.au |
---|---|
State | Deferred |
Delegated to: | Marek Vasut |
Headers | show |
On 17 February 2016 at 18:45, Phil Reid <preid@electromag.com.au> wrote: > G'day George > > > On 18/02/2016 5:54 AM, George Broz wrote: >> >> Hello, >> >> Sorry for the newbie question... >> >> I have an Altera/Terasic board (socfpga_sockit) that has issues >> recognizing >> USB storage devices (roughly 60% good / 40% bad): >> >> If I try a later release (e.g. v2016.01 which seems to support the Terasic >> board explicitly) the boot process stops just after loading the SPL. >> >> At this point I have only been changing the u-boot.img component, not the >> SPL (in the a2 partition of the MMC). >> >> The documentation from Altera about generating the SPL seems to require >> using Qsys/Quartus tools which I'd really like to avoid. >> >> I can produce u-boot-spl.bin / u-boot.img from >> make socfpga_sockit_defconfig; make all. >> >> My newbie question ... should be I able to use directly the u-boot-spl.bin >> generated by the build to replace the SPL on the board? >> > > I've just gone thru the process (this week) of getting uboot 2016.01 to boot > on our custom socfpga board. > There where a few issues in getting things going. > If your using the sd card to boot then the current memory layout is not per > the altera documentation. > I had to make the changes below to config to match the altera docs. > Otherwise it hangs just after the SPL. > You also need to use the -dtb image versions with 2016.01 for things to > work. > Again you may need to make sure the uboot device trees match your hardware. > Not all uboot drivers appear to be using the DT as yet. > > Note the SPL is tightly coupled to the board design and potentially the FPGA > image. > If you using bridges or routing HPS resources (eg i2c etc) to the fpga the > SPL configures the muxes. > > There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh > That will generate the qts files for you arch. > > I haven't tried the USB stuff as yet. > There are some issues witht eh altera USB port trigger an Over Current event > on device insertation. > They've modified the linux kenerl driver to use external OV current > detection to get around the problem. > My intial workaround was to insert USB device prior to power on. > I haven't looked at the uboot USB driver yet to see what's in there. > > > -- > Regards > Phil Reid > > > diff --git a/include/configs/socfpga_common.h > b/include/configs/socfpga_common.h > index a09e906..3a1b59b 100644 (file) > --- a/include/configs/socfpga_common.h > +++ b/include/configs/socfpga_common.h > @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); > > /* SPL SDMMC boot support */ > #ifdef CONFIG_SPL_MMC_SUPPORT > +#define CONFIG_SPL_LIBDISK_SUPPORT > #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) > #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2 > #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" > -#define CONFIG_SPL_LIBDISK_SUPPORT > #else > -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3 > -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect > (1M+256k) */ > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3 > +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 > #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ > #endif > #endif > > Thanks, Phil! Sorry for the delayed response - got called away, but am back to this now. I patched socfpga_common.h and re-built the project. I picked up spl/u-boot-spl-dtb.sfp and u-boot-dtb.img and transferred them to the SD card with: dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi, socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and also an Altera-patched DT set that I've used to boot into Linux numerous times. When I start up the board I get: U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) drivers/ddr/altera/sequencer.c: Preparing to start memory calibration drivers/ddr/altera/sequencer.c: CALIBRATION FAILED drivers/ddr/altera/sequencer.c: Calibration complete SDRAM calibration failed. ### ERROR ### Please RESET the board ### I'm not a Quartus user, so I haven't done anything with the qts-filter.sh script you mentioned. Do I need to? I don't have any custom FPGA logic - it's just the Terasic board out of the box. Thanks for any help! --George Broz Moog Industrial Group
On 2/03/2016 10:40 AM, George Broz wrote: > Sorry for the delayed response - got called away, but am back to this > now. I patched > socfpga_common.h and re-built the project. I picked up > spl/u-boot-spl-dtb.sfp and > u-boot-dtb.img and transferred them to the SD card with: > > dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 > dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 > > Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi, > socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and > also an Altera-patched DT set that I've used to boot into Linux numerous times. > > When I start up the board I get: > > U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) > drivers/ddr/altera/sequencer.c: Preparing to start memory calibration > drivers/ddr/altera/sequencer.c: CALIBRATION FAILED > drivers/ddr/altera/sequencer.c: Calibration complete > SDRAM calibration failed. > ### ERROR ### Please RESET the board ### > > I'm not a Quartus user, so I haven't done anything with the > qts-filter.sh script you > mentioned. Do I need to? I don't have any custom FPGA logic - it's > just the Terasic > board out of the box. > > Thanks for any help! > Even without the custom FPGA logic the files generated from qts-filter.sh need to match your board. Sets up PLL and SDRAM parameters. I'm not familiar with the Terasic dev board ( I do have the altera devkit, but haven't used it for awhile). I'd hope the files in the git repo are correct for your board. Without the corresponding qsys project it's hard to be sure. The sd card write commands look correct. I just used a dts files in the uboot source but modified a couple of things. Update Mem size and serial port speeds to match our requirements. I also modified a few debug statements so the spl outputs a bit more info by default. Output is alot closer to the altera supplied uboot tree. My spl bootup is: U-Boot SPL 2016.01-00003-g40d1cd2 (Mar 01 2016 - 15:29:44) CLOCK: MPU 800000 kHz CLOCK: DDR 400000 kHz CLOCK: EOSC1 50000 kHz CLOCK: EOSC2 50000 kHz CLOCK: F2S_SDR_REF 0 kHz CLOCK: F2S_PER_REF 0 kHz CLOCK: MMC 50000 kHz CLOCK: QSPI 400000 kHz CLOCK: UART 100000 kHz CLOCK: SPI 200000 kHz INFO: Changing address order to 2 (row, chip, bank, column) SDRAM: Calibrating PHY SDRAM: Preparing to start memory calibration SDRAM: CALIBRATION PASSED SDRAM: Calibration complete SDRAM: 2048 MiB Trying to boot from MMC U-Boot 2016.01-00003-g40d1cd2 (Mar 01 2016 - 15:29:44 +0800) Marek who committed the terasic config may be able to help. It most likely a mismatch in the qts config vs hardware.
CC: Marek Vasut On 03/01/2016 08:40 PM, George Broz wrote: > On 17 February 2016 at 18:45, Phil Reid <preid@electromag.com.au> wrote: >> G'day George >> >> >> On 18/02/2016 5:54 AM, George Broz wrote: >>> >>> Hello, >>> >>> Sorry for the newbie question... >>> >>> I have an Altera/Terasic board (socfpga_sockit) that has issues >>> recognizing >>> USB storage devices (roughly 60% good / 40% bad): >>> > >>> If I try a later release (e.g. v2016.01 which seems to support the Terasic >>> board explicitly) the boot process stops just after loading the SPL. >>> >>> At this point I have only been changing the u-boot.img component, not the >>> SPL (in the a2 partition of the MMC). >>> >>> The documentation from Altera about generating the SPL seems to require >>> using Qsys/Quartus tools which I'd really like to avoid. >>> >>> I can produce u-boot-spl.bin / u-boot.img from >>> make socfpga_sockit_defconfig; make all. >>> >>> My newbie question ... should be I able to use directly the u-boot-spl.bin >>> generated by the build to replace the SPL on the board? >>> >> >> I've just gone thru the process (this week) of getting uboot 2016.01 to boot >> on our custom socfpga board. >> There where a few issues in getting things going. >> If your using the sd card to boot then the current memory layout is not per >> the altera documentation. >> I had to make the changes below to config to match the altera docs. >> Otherwise it hangs just after the SPL. >> You also need to use the -dtb image versions with 2016.01 for things to >> work. >> Again you may need to make sure the uboot device trees match your hardware. >> Not all uboot drivers appear to be using the DT as yet. >> >> Note the SPL is tightly coupled to the board design and potentially the FPGA >> image. >> If you using bridges or routing HPS resources (eg i2c etc) to the fpga the >> SPL configures the muxes. >> >> There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh >> That will generate the qts files for you arch. >> >> I haven't tried the USB stuff as yet. >> There are some issues witht eh altera USB port trigger an Over Current event >> on device insertation. >> They've modified the linux kenerl driver to use external OV current >> detection to get around the problem. >> My intial workaround was to insert USB device prior to power on. >> I haven't looked at the uboot USB driver yet to see what's in there. >> >> >> -- >> Regards >> Phil Reid >> >> >> diff --git a/include/configs/socfpga_common.h >> b/include/configs/socfpga_common.h >> index a09e906..3a1b59b 100644 (file) >> --- a/include/configs/socfpga_common.h >> +++ b/include/configs/socfpga_common.h >> @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); >> >> /* SPL SDMMC boot support */ >> #ifdef CONFIG_SPL_MMC_SUPPORT >> +#define CONFIG_SPL_LIBDISK_SUPPORT >> #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) >> #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2 >> #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" >> -#define CONFIG_SPL_LIBDISK_SUPPORT >> #else >> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3 >> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect >> (1M+256k) */ >> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3 >> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 >> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ >> #endif >> #endif >> >> > > Thanks, Phil! > > Sorry for the delayed response - got called away, but am back to this > now. I patched > socfpga_common.h and re-built the project. I picked up > spl/u-boot-spl-dtb.sfp and > u-boot-dtb.img and transferred them to the SD card with: > > dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 > dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 > You can just do a 'make u-boot-with-spl.sfp' and burn the u-boot-with-spl.sfp file straight to the a2 partition, or sdf3. > Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi, > socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and > also an Altera-patched DT set that I've used to boot into Linux numerous times. > > When I start up the board I get: > > U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) > drivers/ddr/altera/sequencer.c: Preparing to start memory calibration > drivers/ddr/altera/sequencer.c: CALIBRATION FAILED > drivers/ddr/altera/sequencer.c: Calibration complete > SDRAM calibration failed. > ### ERROR ### Please RESET the board ### > > I'm not a Quartus user, so I haven't done anything with the > qts-filter.sh script you > mentioned. Do I need to? I don't have any custom FPGA logic - it's > just the Terasic > board out of the box. > I just tested U-Boot(v2016.03-rc3) and USB is not working on the devkit or sockit. It's failing to detect my mass storage device. Debugging... Dinh
On 03/02/2016 11:54 PM, Dinh Nguyen wrote: > CC: Marek Vasut > > On 03/01/2016 08:40 PM, George Broz wrote: >> On 17 February 2016 at 18:45, Phil Reid <preid@electromag.com.au> wrote: >>> G'day George >>> >>> >>> On 18/02/2016 5:54 AM, George Broz wrote: >>>> >>>> Hello, >>>> >>>> Sorry for the newbie question... >>>> >>>> I have an Altera/Terasic board (socfpga_sockit) that has issues >>>> recognizing >>>> USB storage devices (roughly 60% good / 40% bad): >>>> >> >>>> If I try a later release (e.g. v2016.01 which seems to support the Terasic >>>> board explicitly) the boot process stops just after loading the SPL. >>>> >>>> At this point I have only been changing the u-boot.img component, not the >>>> SPL (in the a2 partition of the MMC). >>>> >>>> The documentation from Altera about generating the SPL seems to require >>>> using Qsys/Quartus tools which I'd really like to avoid. >>>> >>>> I can produce u-boot-spl.bin / u-boot.img from >>>> make socfpga_sockit_defconfig; make all. >>>> >>>> My newbie question ... should be I able to use directly the u-boot-spl.bin >>>> generated by the build to replace the SPL on the board? >>>> >>> >>> I've just gone thru the process (this week) of getting uboot 2016.01 to boot >>> on our custom socfpga board. >>> There where a few issues in getting things going. >>> If your using the sd card to boot then the current memory layout is not per >>> the altera documentation. >>> I had to make the changes below to config to match the altera docs. >>> Otherwise it hangs just after the SPL. >>> You also need to use the -dtb image versions with 2016.01 for things to >>> work. >>> Again you may need to make sure the uboot device trees match your hardware. >>> Not all uboot drivers appear to be using the DT as yet. >>> >>> Note the SPL is tightly coupled to the board design and potentially the FPGA >>> image. >>> If you using bridges or routing HPS resources (eg i2c etc) to the fpga the >>> SPL configures the muxes. >>> >>> There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh >>> That will generate the qts files for you arch. >>> >>> I haven't tried the USB stuff as yet. >>> There are some issues witht eh altera USB port trigger an Over Current event >>> on device insertation. >>> They've modified the linux kenerl driver to use external OV current >>> detection to get around the problem. >>> My intial workaround was to insert USB device prior to power on. >>> I haven't looked at the uboot USB driver yet to see what's in there. >>> >>> >>> -- >>> Regards >>> Phil Reid >>> >>> >>> diff --git a/include/configs/socfpga_common.h >>> b/include/configs/socfpga_common.h >>> index a09e906..3a1b59b 100644 (file) >>> --- a/include/configs/socfpga_common.h >>> +++ b/include/configs/socfpga_common.h >>> @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); >>> >>> /* SPL SDMMC boot support */ >>> #ifdef CONFIG_SPL_MMC_SUPPORT >>> +#define CONFIG_SPL_LIBDISK_SUPPORT >>> #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) >>> #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2 >>> #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" >>> -#define CONFIG_SPL_LIBDISK_SUPPORT >>> #else >>> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3 >>> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect >>> (1M+256k) */ >>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3 >>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 >>> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ >>> #endif >>> #endif >>> >>> >> >> Thanks, Phil! >> >> Sorry for the delayed response - got called away, but am back to this >> now. I patched >> socfpga_common.h and re-built the project. I picked up >> spl/u-boot-spl-dtb.sfp and >> u-boot-dtb.img and transferred them to the SD card with: >> >> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 >> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 >> > > You can just do a 'make u-boot-with-spl.sfp' and burn the > u-boot-with-spl.sfp file straight to the a2 partition, or sdf3. > >> Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi, >> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and >> also an Altera-patched DT set that I've used to boot into Linux numerous times. >> >> When I start up the board I get: >> >> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) >> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration >> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED >> drivers/ddr/altera/sequencer.c: Calibration complete >> SDRAM calibration failed. >> ### ERROR ### Please RESET the board ### >> >> I'm not a Quartus user, so I haven't done anything with the >> qts-filter.sh script you >> mentioned. Do I need to? I don't have any custom FPGA logic - it's >> just the Terasic >> board out of the box. >> > > I just tested U-Boot(v2016.03-rc3) and USB is not working on the devkit > or sockit. It's failing to detect my mass storage device. > > Debugging... Try dcache off ... does it work ?
On 03/02/2016 04:54 PM, Dinh Nguyen wrote: > CC: Marek Vasut > > On 03/01/2016 08:40 PM, George Broz wrote: >> On 17 February 2016 at 18:45, Phil Reid <preid@electromag.com.au> wrote: >>> G'day George >>> >>> >>> On 18/02/2016 5:54 AM, George Broz wrote: >>>> >>>> Hello, >>>> >>>> Sorry for the newbie question... >>>> >>>> I have an Altera/Terasic board (socfpga_sockit) that has issues >>>> recognizing >>>> USB storage devices (roughly 60% good / 40% bad): >>>> >> >>>> If I try a later release (e.g. v2016.01 which seems to support the Terasic >>>> board explicitly) the boot process stops just after loading the SPL. >>>> >>>> At this point I have only been changing the u-boot.img component, not the >>>> SPL (in the a2 partition of the MMC). >>>> >>>> The documentation from Altera about generating the SPL seems to require >>>> using Qsys/Quartus tools which I'd really like to avoid. >>>> >>>> I can produce u-boot-spl.bin / u-boot.img from >>>> make socfpga_sockit_defconfig; make all. >>>> >>>> My newbie question ... should be I able to use directly the u-boot-spl.bin >>>> generated by the build to replace the SPL on the board? >>>> >>> >>> I've just gone thru the process (this week) of getting uboot 2016.01 to boot >>> on our custom socfpga board. >>> There where a few issues in getting things going. >>> If your using the sd card to boot then the current memory layout is not per >>> the altera documentation. >>> I had to make the changes below to config to match the altera docs. >>> Otherwise it hangs just after the SPL. >>> You also need to use the -dtb image versions with 2016.01 for things to >>> work. >>> Again you may need to make sure the uboot device trees match your hardware. >>> Not all uboot drivers appear to be using the DT as yet. >>> >>> Note the SPL is tightly coupled to the board design and potentially the FPGA >>> image. >>> If you using bridges or routing HPS resources (eg i2c etc) to the fpga the >>> SPL configures the muxes. >>> >>> There's a script in uboot src at arch\arm\mach-socfpga\qts-filter.sh >>> That will generate the qts files for you arch. >>> >>> I haven't tried the USB stuff as yet. >>> There are some issues witht eh altera USB port trigger an Over Current event >>> on device insertation. >>> They've modified the linux kenerl driver to use external OV current >>> detection to get around the problem. >>> My intial workaround was to insert USB device prior to power on. >>> I haven't looked at the uboot USB driver yet to see what's in there. >>> >>> >>> -- >>> Regards >>> Phil Reid >>> >>> >>> diff --git a/include/configs/socfpga_common.h >>> b/include/configs/socfpga_common.h >>> index a09e906..3a1b59b 100644 (file) >>> --- a/include/configs/socfpga_common.h >>> +++ b/include/configs/socfpga_common.h >>> @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); >>> >>> /* SPL SDMMC boot support */ >>> #ifdef CONFIG_SPL_MMC_SUPPORT >>> +#define CONFIG_SPL_LIBDISK_SUPPORT >>> #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) >>> #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2 >>> #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" >>> -#define CONFIG_SPL_LIBDISK_SUPPORT >>> #else >>> -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3 >>> -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect >>> (1M+256k) */ >>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3 >>> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 >>> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ >>> #endif >>> #endif >>> >>> >> >> Thanks, Phil! >> >> Sorry for the delayed response - got called away, but am back to this >> now. I patched >> socfpga_common.h and re-built the project. I picked up >> spl/u-boot-spl-dtb.sfp and >> u-boot-dtb.img and transferred them to the SD card with: >> >> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 >> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 >> > > You can just do a 'make u-boot-with-spl.sfp' and burn the > u-boot-with-spl.sfp file straight to the a2 partition, or sdf3. > >> Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi, >> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and >> also an Altera-patched DT set that I've used to boot into Linux numerous times. >> >> When I start up the board I get: >> >> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) >> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration >> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED >> drivers/ddr/altera/sequencer.c: Calibration complete >> SDRAM calibration failed. >> ### ERROR ### Please RESET the board ### >> >> I'm not a Quartus user, so I haven't done anything with the >> qts-filter.sh script you >> mentioned. Do I need to? I don't have any custom FPGA logic - it's >> just the Terasic >> board out of the box. >> > > I just tested U-Boot(v2016.03-rc3) and USB is not working on the devkit > or sockit. It's failing to detect my mass storage device. > > Debugging... > Sorry, I mis-spoke for the sockit. I have to turn dcache off for USB to work reliably. => dcache off => usb start starting USB... USB0: Core Release: 2.93a scanning bus 0 for devices... 2 USB Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | U-Boot Root Hub | +-2 Mass Storage (480 Mb/s, 200mA) SanDisk Firebird USB Flash Drive 4C532000040115111005 => version U-Boot 2016.03-rc3 (Mar 02 2016 - 17:00:25 -0600) Dinh
On 1 March 2016 at 19:49, Phil Reid <preid@electromag.com.au> wrote: > On 2/03/2016 10:40 AM, George Broz wrote: > >> Sorry for the delayed response - got called away, but am back to this >> now. I patched >> socfpga_common.h and re-built the project. I picked up >> spl/u-boot-spl-dtb.sfp and >> u-boot-dtb.img and transferred them to the SD card with: >> >> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 >> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 >> >> Tried this with both the original DT set (socfpga.dtsi, >> socfpga_cyclone.dtsi, >> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download >> and >> also an Altera-patched DT set that I've used to boot into Linux numerous >> times. >> >> When I start up the board I get: >> >> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) >> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration >> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED >> drivers/ddr/altera/sequencer.c: Calibration complete >> SDRAM calibration failed. >> ### ERROR ### Please RESET the board ### >> >> I'm not a Quartus user, so I haven't done anything with the >> qts-filter.sh script you >> mentioned. Do I need to? I don't have any custom FPGA logic - it's >> just the Terasic >> board out of the box. >> >> Thanks for any help! >> > > Even without the custom FPGA logic the files generated from qts-filter.sh > need to match your board. > Sets up PLL and SDRAM parameters. > I'm not familiar with the Terasic dev board ( I do have the altera devkit, > but haven't used it for awhile). > I'd hope the files in the git repo are correct for your board. > Without the corresponding qsys project it's hard to be sure. > Hi Phil, So as my next attempt, there was a Quartus/Qsys example that came with the Terasic board (specific to my Rev. of the board). * I took the contents of the 'handoff folder', .sof, and .sopcinfo file. * launched an "Embedded Command Shell" from EDS 15.0 and then the BSP editor GUI * pointed the BSP editor to the "handoff folder", and hit "Generate" to produce iocsr, pinmux, pll, etc. files * applied qts-filter.sh to these files, the output of which I then dropped into the u-boot source @ ../board/terasic/sockit/qts * rebuilt uboot spl & image, but got a similar result: U-Boot SPL 2016.01 (Mar 02 2016 - 22:13:31) drivers/ddr/altera/sequencer.c: Preparing to start memory calibration drivers/ddr/altera/sequencer.c: CALIBRATION FAILED drivers/ddr/altera/sequencer.c: Calibration complete SDRAM calibration failed. ### ERROR ### Please RESET the board ### Except now it repeats four times, whereas before it only printed out once. It that essentially the correct procedure? Is it now a matter of looking through the include files that where generated by qts-filter.sh to find a setting that is "off"? (BTW - my first attempt was to use EDS 13.0, but that resulted in several undefined macros when it came time to compile u-boot with the qts-filter-generated code. How does one know which tool version to use?) Thanks, --George > The sd card write commands look correct. > I just used a dts files in the uboot source but modified a couple of things. > Update Mem size and serial port speeds to match our requirements. > > I also modified a few debug statements so the spl outputs a bit more info by > default. > Output is alot closer to the altera supplied uboot tree. > > My spl bootup is: > > U-Boot SPL 2016.01-00003-g40d1cd2 (Mar 01 2016 - 15:29:44) > CLOCK: MPU 800000 kHz > CLOCK: DDR 400000 kHz > CLOCK: EOSC1 50000 kHz > CLOCK: EOSC2 50000 kHz > CLOCK: F2S_SDR_REF 0 kHz > CLOCK: F2S_PER_REF 0 kHz > CLOCK: MMC 50000 kHz > CLOCK: QSPI 400000 kHz > CLOCK: UART 100000 kHz > CLOCK: SPI 200000 kHz > INFO: Changing address order to 2 (row, chip, bank, column) > SDRAM: Calibrating PHY > SDRAM: Preparing to start memory calibration > SDRAM: CALIBRATION PASSED > SDRAM: Calibration complete > SDRAM: 2048 MiB > Trying to boot from MMC > > > U-Boot 2016.01-00003-g40d1cd2 (Mar 01 2016 - 15:29:44 +0800) > > > Marek who committed the terasic config may be able to help. > It most likely a mismatch in the qts config vs hardware. > > > -- > Regards > Phil Reid > > ElectroMagnetic Imaging Technology Pty Ltd > Development of Geophysical Instrumentation & Software > www.electromag.com.au > > 3 The Avenue, Midland WA 6056, AUSTRALIA > Ph: +61 8 9250 8100 > Fax: +61 8 9250 7100 > Email: preid@electromag.com.au
On 2 March 2016 at 14:54, Dinh Nguyen <dinguyen@opensource.altera.com> wrote: >> socfpga_common.h and re-built the project. I picked up >> spl/u-boot-spl-dtb.sfp and >> u-boot-dtb.img and transferred them to the SD card with: >> >> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 >> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 >> > > You can just do a 'make u-boot-with-spl.sfp' and burn the > u-boot-with-spl.sfp file straight to the a2 partition, or sdf3. > Thanks, Dinh. That's a time saver. On my version that target is: 'make u-boot-with-spl-dtb.sfp' Thanks, --George
On 3/03/2016 2:49 PM, George Broz wrote: > On 1 March 2016 at 19:49, Phil Reid <preid@electromag.com.au> wrote: >> On 2/03/2016 10:40 AM, George Broz wrote: >> >>> Sorry for the delayed response - got called away, but am back to this >>> now. I patched >>> socfpga_common.h and re-built the project. I picked up >>> spl/u-boot-spl-dtb.sfp and >>> u-boot-dtb.img and transferred them to the SD card with: >>> >>> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 >>> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 >>> >>> Tried this with both the original DT set (socfpga.dtsi, >>> socfpga_cyclone.dtsi, >>> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download >>> and >>> also an Altera-patched DT set that I've used to boot into Linux numerous >>> times. >>> >>> When I start up the board I get: >>> >>> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) >>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration >>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED >>> drivers/ddr/altera/sequencer.c: Calibration complete >>> SDRAM calibration failed. >>> ### ERROR ### Please RESET the board ### >>> >>> I'm not a Quartus user, so I haven't done anything with the >>> qts-filter.sh script you >>> mentioned. Do I need to? I don't have any custom FPGA logic - it's >>> just the Terasic >>> board out of the box. >>> >>> Thanks for any help! >>> >> >> Even without the custom FPGA logic the files generated from qts-filter.sh >> need to match your board. >> Sets up PLL and SDRAM parameters. >> I'm not familiar with the Terasic dev board ( I do have the altera devkit, >> but haven't used it for awhile). >> I'd hope the files in the git repo are correct for your board. >> Without the corresponding qsys project it's hard to be sure. >> > Hi Phil, > > So as my next attempt, there was a Quartus/Qsys example that came > with the Terasic board (specific to my Rev. of the board). > > * I took the contents of the 'handoff folder', .sof, and .sopcinfo file. > * launched an "Embedded Command Shell" from EDS 15.0 and then the BSP editor GUI > * pointed the BSP editor to the "handoff folder", and hit "Generate" > to produce iocsr, pinmux, pll, etc. files > * applied qts-filter.sh to these files, the output of which I then > dropped into the u-boot source @ ../board/terasic/sockit/qts > * rebuilt uboot spl & image, but got a similar result: > > U-Boot SPL 2016.01 (Mar 02 2016 - 22:13:31) > drivers/ddr/altera/sequencer.c: Preparing to start memory calibration > drivers/ddr/altera/sequencer.c: CALIBRATION FAILED > drivers/ddr/altera/sequencer.c: Calibration complete > SDRAM calibration failed. > ### ERROR ### Please RESET the board ### > > Except now it repeats four times, whereas before it only printed out once. > > It that essentially the correct procedure? Is it now a matter of > looking through > the include files that where generated by qts-filter.sh to find a > setting that is "off"? > > (BTW - my first attempt was to use EDS 13.0, but that resulted in > several undefined macros when it > came time to compile u-boot with the qts-filter-generated code. How > does one know which tool version to use?) > What does a diff of the new files show compared to the ones in uboot. I'm using the Quartus 15.0 tool chain at the moment. Turning on debugging in drivers/ddr/altera/sequencer.c may help.
On 03/03/2016 07:55 AM, George Broz wrote: > On 2 March 2016 at 14:54, Dinh Nguyen <dinguyen@opensource.altera.com> wrote: > >>> socfpga_common.h and re-built the project. I picked up >>> spl/u-boot-spl-dtb.sfp and >>> u-boot-dtb.img and transferred them to the SD card with: >>> >>> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 >>> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 >>> >> >> You can just do a 'make u-boot-with-spl.sfp' and burn the >> u-boot-with-spl.sfp file straight to the a2 partition, or sdf3. >> > Thanks, Dinh. That's a time saver. > > On my version that target is: 'make u-boot-with-spl-dtb.sfp' This was changed after 2016.01 was out by the following patch: commit bd7dc3883bf4e61538e5519ca2d6798b3e8e0695 Author: Simon Glass <sjg@chromium.org> Date: Sun Jan 31 18:10:53 2016 -0700 socfpga: Simplify Makefile filenames
On 2 March 2016 at 23:11, Phil Reid <preid@electromag.com.au> wrote: > On 3/03/2016 2:49 PM, George Broz wrote: >> >> On 1 March 2016 at 19:49, Phil Reid <preid@electromag.com.au> wrote: >>> >>> On 2/03/2016 10:40 AM, George Broz wrote: >>> >>>> Sorry for the delayed response - got called away, but am back to this >>>> now. I patched >>>> socfpga_common.h and re-built the project. I picked up >>>> spl/u-boot-spl-dtb.sfp and >>>> u-boot-dtb.img and transferred them to the SD card with: >>>> >>>> dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 >>>> dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4 >>>> >>>> Tried this with both the original DT set (socfpga.dtsi, >>>> socfpga_cyclone.dtsi, >>>> socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download >>>> and >>>> also an Altera-patched DT set that I've used to boot into Linux numerous >>>> times. >>>> >>>> When I start up the board I get: >>>> >>>> U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) >>>> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration >>>> drivers/ddr/altera/sequencer.c: CALIBRATION FAILED >>>> drivers/ddr/altera/sequencer.c: Calibration complete >>>> SDRAM calibration failed. >>>> ### ERROR ### Please RESET the board ### >>>> >>>> I'm not a Quartus user, so I haven't done anything with the >>>> qts-filter.sh script you >>>> mentioned. Do I need to? I don't have any custom FPGA logic - it's >>>> just the Terasic >>>> board out of the box. >>>> >>>> Thanks for any help! >>>> >>> >>> Even without the custom FPGA logic the files generated from qts-filter.sh >>> need to match your board. >>> Sets up PLL and SDRAM parameters. >>> I'm not familiar with the Terasic dev board ( I do have the altera >>> devkit, >>> but haven't used it for awhile). >>> I'd hope the files in the git repo are correct for your board. >>> Without the corresponding qsys project it's hard to be sure. >>> >> Hi Phil, >> >> So as my next attempt, there was a Quartus/Qsys example that came >> with the Terasic board (specific to my Rev. of the board). >> >> * I took the contents of the 'handoff folder', .sof, and .sopcinfo file. >> * launched an "Embedded Command Shell" from EDS 15.0 and then the BSP >> editor GUI >> * pointed the BSP editor to the "handoff folder", and hit "Generate" >> to produce iocsr, pinmux, pll, etc. files >> * applied qts-filter.sh to these files, the output of which I then >> dropped into the u-boot source @ ../board/terasic/sockit/qts >> * rebuilt uboot spl & image, but got a similar result: > What does a diff of the new files show compared to the ones in uboot. > I'm using the Quartus 15.0 tool chain at the moment. > Turning on debugging in drivers/ddr/altera/sequencer.c may help. > > > -- > Regards > Phil Reid > If I build the SPL using in the embedded_command_shell environment: ~/altera/15/embedded/embedded_command_shell.sh cd ~/<to-folder-generated-by-BSP editor>/software/spl_bsp make I get a working preloader-mkpimage.bin that seems to work with the u-boot.img generated from the 2016.01 release: U-Boot SPL 2013.01.01 (Mar 03 2016 - 08:10:01) BOARD : Altera SOCFPGA Cyclone V Board CLOCK: EOSC1 clock 25000 KHz CLOCK: EOSC2 clock 25000 KHz CLOCK: F2S_SDR_REF clock 0 KHz CLOCK: F2S_PER_REF clock 0 KHz CLOCK: MPU clock 925 MHz CLOCK: DDR clock 400 MHz CLOCK: UART clock 100000 KHz CLOCK: MMC clock 50000 KHz CLOCK: QSPI clock 370000 KHz RESET: WARM INFO : Watchdog enabled SDRAM: Initializing MMR registers SDRAM: Calibrating PHY SEQ.C: Preparing to start memory calibration SEQ.C: CALIBRATION PASSED SDRAM: 1024 MiB ALTERA DWMMC: 0 U-Boot 2016.01 (Mar 03 2016 - 13:02:56 -0800) CPU: Altera SoCFPGA Platform FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 BOOT: SD/MMC Internal Transceiver (3.0V) Watchdog enabled I2C: ready DRAM: 1 GiB MMC: dwmmc0@ff704000: 0 In: serial Out: serial Err: serial Model: Terasic SoCkit Net: Error: ethernet@ff702000 address not set. No ethernet found. Hit any key to stop autoboot: 0 That would seem to indicate at least my quartus/qsys project and the files it generates are valid and that something is amiss with the terasic board support code? BTW - if I set DLEVEL=1 in sequencer.c with the 2016.01-generated SPL I get: U-Boot SPL 2016.01 (Mar 03 2016 - 11:24:11) scc_mgr_initialize:281: Clearing SCC RFILE index 0 scc_mgr_initialize:281: Clearing SCC RFILE index 1 scc_mgr_initialize:281: Clearing SCC RFILE index 2 scc_mgr_initialize:281: Clearing SCC RFILE index 3 scc_mgr_initialize:281: Clearing SCC RFILE index 4 scc_mgr_initialize:281: Clearing SCC RFILE index 5 scc_mgr_initialize:281: Clearing SCC RFILE index 6 scc_mgr_initialize:281: Clearing SCC RFILE index 7 scc_mgr_initialize:281: Clearing SCC RFILE index 8 scc_mgr_initialize:281: Clearing SCC RFILE index 9 scc_mgr_initialize:281: Clearing SCC RFILE index 10 scc_mgr_initialize:281: Clearing SCC RFILE index 11 scc_mgr_initialize:281: Clearing SCC RFILE index 12 scc_mgr_initialize:281: Clearing SCC RFILE index 13 scc_mgr_initialize:281: Clearing SCC RFILE index 14 scc_mgr_initialize:281: Clearing SCC RFILE index 15 If that's of use to anyone... Thanks, --George
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index a09e906..3a1b59b 100644 (file) --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -357,13 +357,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" -#define CONFIG_SPL_LIBDISK_SUPPORT #else -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3 -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect (1M+256k) */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 3 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ #endif #endif