Index: config/m32c/m32c.c
===================================================================
--- config/m32c/m32c.c	(revision 162014)
+++ config/m32c/m32c.c	(working copy)
@@ -428,12 +428,16 @@ m32c_override_options (void)
     }
   else
     target_memregs = 16;
 
   if (TARGET_A24)
     flag_ivopts = 0;
+
+  /* This target defaults to strict volatile bitfields.  */
+  if (flag_strict_volatile_bitfields < 0)
+    flag_strict_volatile_bitfields = 1;
 }
 
 /* Defining data structures for per-function information */
 
 /* The usual; we set up our machine_function data.  */
 static struct machine_function *
Index: config/rx/rx.h
===================================================================
--- config/rx/rx.h	(revision 162014)
+++ config/rx/rx.h	(working copy)
@@ -87,12 +87,14 @@ extern enum rx_cpu_types  rx_cpu_type;
 --end-group					   	\
 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}}		\
 "
 
 #undef  LINK_SPEC
 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
+
+#define OVERRIDE_OPTIONS rx_override_options ()
 
 
 #define BITS_BIG_ENDIAN 		0
 #define BYTES_BIG_ENDIAN 		TARGET_BIG_ENDIAN_DATA
 #define WORDS_BIG_ENDIAN 		TARGET_BIG_ENDIAN_DATA
 
Index: config/rx/rx-protos.h
===================================================================
--- config/rx/rx-protos.h	(revision 162014)
+++ config/rx/rx-protos.h	(working copy)
@@ -26,12 +26,13 @@
 #define Fargs	CUMULATIVE_ARGS
 
 extern void		rx_conditional_register_usage (void);
 extern void		rx_expand_prologue (void);
 extern int		rx_initial_elimination_offset (int, int);
 extern void		rx_set_optimization_options (void);
+extern void		rx_override_options (void);
 
 #ifdef RTX_CODE
 extern bool		rx_compare_redundant (rtx);
 extern void             rx_emit_stack_popm (rtx *, bool);
 extern void             rx_emit_stack_pushm (rtx *);
 extern void		rx_expand_epilogue (bool);
Index: config/rx/rx.c
===================================================================
--- config/rx/rx.c	(revision 162014)
+++ config/rx/rx.c	(working copy)
@@ -2187,12 +2187,21 @@ rx_set_optimization_options (void)
 
       if (saved_allow_rx_fpu != ALLOW_RX_FPU_INSNS)
 	error ("Changing the FPU insns/math optimizations pairing is not supported");
     }
 }
 
+/* Implements OVERRIDE_OPTIONS.  */
+void
+rx_override_options (void)
+{
+  /* This target defaults to strict volatile bitfields.  */
+  if (flag_strict_volatile_bitfields < 0)
+    flag_strict_volatile_bitfields = 1;
+}
+
 
 static bool
 rx_allocate_stack_slots_for_args (void)
 {
   /* Naked functions should not allocate stack slots for arguments.  */
   return ! is_naked_func (NULL_TREE);
Index: config/sh/sh.c
===================================================================
--- config/sh/sh.c	(revision 162014)
+++ config/sh/sh.c	(working copy)
@@ -970,12 +970,16 @@ sh_override_options (void)
       if (align_functions < min_align)
 	align_functions = min_align;
     }
 
   if (sh_fixed_range_str)
     sh_fix_range (sh_fixed_range_str);
+
+  /* This target defaults to strict volatile bitfields.  */
+  if (flag_strict_volatile_bitfields < 0)
+    flag_strict_volatile_bitfields = 1;
 }
 
 /* Print the operand address in x to the stream.  */
 
 static void
 sh_print_operand_address (FILE *stream, rtx x)
Index: config/h8300/h8300.c
===================================================================
--- config/h8300/h8300.c	(revision 162014)
+++ config/h8300/h8300.c	(working copy)
@@ -400,12 +400,16 @@ h8300_init_once (void)
     {
       /* We use movmd sequences for some moves since it can be quicker
 	 than calling memcpy().  The sequences will need to save and
 	 restore er6 though, so bump up the cost.  */
       h8300_move_ratio = 6;
     }
+
+  /* This target defaults to strict volatile bitfields.  */
+  if (flag_strict_volatile_bitfields < 0)
+    flag_strict_volatile_bitfields = 1;
 }
 
 /* Implement REG_CLASS_FROM_LETTER.
 
    Some patterns need to use er6 as a scratch register.  This is
    difficult to arrange since er6 is the frame pointer and usually