diff --git a/hw/usb-ehci.c b/hw/usb-ehci.c
index ab9a23e..6e455a2 100644
--- a/hw/usb-ehci.c
+++ b/hw/usb-ehci.c
@@ -778,19 +778,19 @@ static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val)
         break;
 
     case PERIODICLISTBASE:
-        if (s->usbcmd & USBCMD_PSE) {
-            fprintf(stderr, "Guest OS should not be setting the periodic"
-                   " list base register while periodic schedule is enabled\n");
-            return;
+        if ((s->usbcmd & USBCMD_PSE) && (s->usbcmd & USBCMD_RUNSTOP)) {
+            fprintf(stderr, 
+              "ehci: PERIODIC list base register set while periodic schedule\n"
+              "      is enabled and HC is enabled\n");
         }
-        DPRINTF("ehci_mem_writel: %s set to 0x%08X\n", str, val);
+        DPRINTF("ehci_mem_writel: P-LIST BASE set to 0x%08X\n", val);
         break;
 
     case ASYNCLISTADDR:
-        if (s->usbcmd & USBCMD_ASE) {
-            fprintf(stderr, "Guest OS should not be setting the async list"
-                   " address register while async schedule is enabled\n");
-            return;
+        if ((s->usbcmd & USBCMD_ASE) && (s->usbcmd & USBCMD_RUNSTOP)) {
+            fprintf(stderr, 
+              "ehci: ASYNC list address register set while async schedule\n"
+              "      is enabled and HC is enabled\n");
         }
         DPRINTF("ehci_mem_writel: A-LIST ADDR set to 0x%08X\n", val);
         break;
@@ -1810,6 +1810,11 @@ static void ehci_advance_async_state(EHCIState *ehci)
 
         DPRINTF_ST("ASYNC: waiting for listhead, starting at %08x\n",
                 ehci->asynclistaddr);
+        /* check that address register has been set */
+        if (ehci->asynclistaddr == 0) {
+            break;
+        }
+
         ehci->astate = ehci_advance_state(ehci, 1, EST_WAITLISTHEAD);
         break;
 
@@ -1853,6 +1858,10 @@ static void ehci_advance_periodic_state(EHCIState *ehci)
         }
 
         list = ehci->periodiclistbase & 0xfffff000;
+        /* check that register has been set */
+        if (list == 0) {
+            break;
+        }
         list |= ((ehci->frindex & 0x1ff8) >> 1);
 
         cpu_physical_memory_rw(list, (uint8_t *) &entry, sizeof entry, 0);