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[U-Boot,4/4] Add support for 64-bit MIPS to examples/standalone

Message ID F5D82D2F-0088-4F5A-B703-DF253724E5C0@gmail.com
State Accepted
Commit 4a48cfc4e57b4b247d94a614b2fbfcf03aa45ea1
Delegated to: Daniel Schwierzeck
Headers show

Commit Message

Stanislav Galabov Feb. 17, 2016, 1:23 p.m. UTC 
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
---
 examples/standalone/stubs.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
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Patch

diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 920a0a9..0d62067 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -65,6 +65,23 @@  gd_t *global_data;
 	: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "ip");
 #endif
 #elif defined(CONFIG_MIPS)
+#ifdef CONFIG_CPU_MIPS64
+/*
+ * k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
+ * clobbered register that is also used to set gp ($26). Note that the
+ * jr instruction also executes the instruction immediately following
+ * it; however, GCC/mips generates an additional `nop' after each asm
+ * statement
+ */
+#define EXPORT_FUNC(f, a, x, ...) \
+	asm volatile (			\
+"	.globl " #x "\n"		\
+#x ":\n"				\
+"	ld	$25, %0($26)\n"		\
+"	ld	$25, %1($25)\n"		\
+"	jr	$25\n"			\
+        : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
+#else
 /*
  * k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
  * clobbered register that is also used to set gp ($26). Note that the
@@ -80,6 +97,7 @@  gd_t *global_data;
 "	lw	$25, %1($25)\n"		\
 "	jr	$25\n"			\
 	: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
+#endif
 #elif defined(CONFIG_NIOS2)
 /*
  * gp holds the pointer to the global_data, r8 is call-clobbered