| Message ID | 1455300685-27009-3-git-send-email-zajec5@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
On Fri, Feb 12, 2016 at 1:11 PM, Rafał Miłecki <zajec5@gmail.com> wrote: > So far we were treating ECC strength 1 as Hamming algorithm. It didn't > supporting some less common devices with BCH-1 (e.g. D-Link DIR-885L). > > Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Reviewed-by: Kamal Dasu <kdasu.kdev@gmail.com> Thanks Rafal > --- > drivers/mtd/nand/brcmnand/brcmnand.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c > index 844fc07..b8055da 100644 > --- a/drivers/mtd/nand/brcmnand/brcmnand.c > +++ b/drivers/mtd/nand/brcmnand/brcmnand.c > @@ -1842,7 +1842,7 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) > > switch (chip->ecc.size) { > case 512: > - if (chip->ecc.strength == 1) /* Hamming */ > + if (chip->ecc.algo == NAND_ECC_HAMMING) > cfg->ecc_level = 15; > else > cfg->ecc_level = chip->ecc.strength; > -- > 1.8.4.5 >
On Fri, Feb 12, 2016 at 07:11:25PM +0100, Rafał Miłecki wrote: > So far we were treating ECC strength 1 as Hamming algorithm. It didn't > supporting some less common devices with BCH-1 (e.g. D-Link DIR-885L). > > Signed-off-by: Rafał Miłecki <zajec5@gmail.com> > --- > drivers/mtd/nand/brcmnand/brcmnand.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c > index 844fc07..b8055da 100644 > --- a/drivers/mtd/nand/brcmnand/brcmnand.c > +++ b/drivers/mtd/nand/brcmnand/brcmnand.c > @@ -1842,7 +1842,7 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) > > switch (chip->ecc.size) { > case 512: > - if (chip->ecc.strength == 1) /* Hamming */ > + if (chip->ecc.algo == NAND_ECC_HAMMING) It's probably best we do a little more than this. Right now, this allows someone to specify: nand-ecc-strength = <20>; nand-ecc-stepsize = <512>; nand-ecc-algo = "hamming"; nand-ecc-mode = "hw"; And they'll end up with 1-bit hamming ECC, except nand_base will still think we have 20-bit correction. I think we need to add a check in this driver to be sure we haven't selected >1-bit correction with hamming ECC. Brian > cfg->ecc_level = 15; > else > cfg->ecc_level = chip->ecc.strength; > -- > 1.8.4.5 >
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c index 844fc07..b8055da 100644 --- a/drivers/mtd/nand/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/brcmnand/brcmnand.c @@ -1842,7 +1842,7 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) switch (chip->ecc.size) { case 512: - if (chip->ecc.strength == 1) /* Hamming */ + if (chip->ecc.algo == NAND_ECC_HAMMING) cfg->ecc_level = 15; else cfg->ecc_level = chip->ecc.strength;
So far we were treating ECC strength 1 as Hamming algorithm. It didn't supporting some less common devices with BCH-1 (e.g. D-Link DIR-885L). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)