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[U-Boot,1/3] arm: mvebu: Add some SPI CS attributes

Message ID 1455281538-11911-1-git-send-email-sr@denx.de
State Accepted
Commit 21324ddb8b5c56e608ec25b596846c17dc200a86
Delegated to: Stefan Roese
Headers show

Commit Message

Stefan Roese Feb. 12, 2016, 12:52 p.m. UTC 
These attribute defines may be used to map an area of memory for direct
access to the specific SPI devices. See SPI Direct Access Mode for
further information.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
---
 arch/arm/mach-mvebu/include/mach/cpu.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Stefan Roese March 24, 2016, 8:46 a.m. UTC | #1 
On 12.02.2016 13:52, Stefan Roese wrote:
> These attribute defines may be used to map an area of memory for direct
> access to the specific SPI devices. See SPI Direct Access Mode for
> further information.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Luka Perkov <luka.perkov@sartura.hr>

Applied to u-boot-marvell/master.

Thanks,
Stefan
diff mbox

Patch

diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 017d55f..dd58b4a 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -47,6 +47,9 @@  enum cpu_attrib {
 	CPU_ATTR_DRAM_CS3 = 0x07,
 	CPU_ATTR_NANDFLASH = 0x2f,
 	CPU_ATTR_SPIFLASH = 0x1e,
+	CPU_ATTR_SPI0_CS0 = 0x1e,
+	CPU_ATTR_SPI0_CS1 = 0x5e,
+	CPU_ATTR_SPI1_CS2 = 0x9a,
 	CPU_ATTR_BOOTROM = 0x1d,
 	CPU_ATTR_PCIE_IO = 0xe0,
 	CPU_ATTR_PCIE_MEM = 0xe8,