[v3,07/16] register: Add block initialise helper

From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

Add a helper that will scan a static RegisterAccessInfo Array
and populate a container MemoryRegion with registers as defined.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V3:
 - Fix typo
V2:
 - Use memory_region_add_subregion_no_print()

 hw/core/register.c    | 29 +++++++++++++++++++++++++++++
 include/hw/register.h | 20 ++++++++++++++++++++
 2 files changed, 49 insertions(+)

Alistair Francis <alistair.francis@xilinx.com> writes:

> From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
>
> Add a helper that will scan a static RegisterAccessInfo Array
> and populate a container MemoryRegion with registers as defined.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
> V3:
>  - Fix typo
> V2:
>  - Use memory_region_add_subregion_no_print()
>
>  hw/core/register.c    | 29 +++++++++++++++++++++++++++++
>  include/hw/register.h | 20 ++++++++++++++++++++
>  2 files changed, 49 insertions(+)
>
> diff --git a/hw/core/register.c b/hw/core/register.c
> index 939f398..4d7dd95 100644
> --- a/hw/core/register.c
> +++ b/hw/core/register.c
> @@ -258,6 +258,35 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size)
>      return register_read_memory(opaque, addr, size, false);
>  }
>
> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
> +                           int num, RegisterInfo *ri, uint32_t *data,
> +                           MemoryRegion *container, const MemoryRegionOps *ops,
> +                           bool debug_enabled)

Are there going to be register_init_block8, 16 and 64 variants? Perhaps
this should be a generic register_block function that takes the size and
skip of the registers?

> +{
> +    const char *debug_prefix = object_get_typename(OBJECT(owner));
> +    int i;
> +
> +    for (i = 0; i < num; i++) {
> +        int index = rae[i].decode.addr / 4;
> +        RegisterInfo *r = &ri[index];
> +
> +        *r = (RegisterInfo) {
> +            .data = &data[index],
> +            .data_size = sizeof(uint32_t),
> +            .access = &rae[i],
> +            .debug = debug_enabled,
> +            .prefix = debug_prefix,
> +            .opaque = owner,
> +        };
> +        register_init(r);
> +
> +        memory_region_init_io(&r->mem, OBJECT(owner), ops, r, r->access->name,
> +                              sizeof(uint32_t));
> +        memory_region_add_subregion_no_print(container,
> +                                             r->access->decode.addr,
> &r->mem);

Why a memory region for every register? Couldn't we have a shared region
for the whole block and handle dispatching in the register code?

> +    }
> +}
> +
>  static const TypeInfo register_info = {
>      .name  = TYPE_REGISTER,
>      .parent = TYPE_DEVICE,
> diff --git a/include/hw/register.h b/include/hw/register.h
> index 3316458..30dedbf 100644
> --- a/include/hw/register.h
> +++ b/include/hw/register.h
> @@ -182,6 +182,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value,
>  uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size);
>  uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size);
>
> +/**
> + * Init a block of consecutive registers into a container MemoryRegion. A
> + * number of constant register definitions are parsed to create a corresponding
> + * array of RegisterInfo's.
> + *
> + * @owner: device owning the registers
> + * @rae: Register definitions to init
> + * @num: number of registers to init (length of @rae)
> + * @ri: Register array to init
> + * @data: Array to use for register data
> + * @container: Memory region to contain new registers
> + * @ops: Memory region ops to access registers.
> + * @debug enabled: turn on/off verbose debug information
> + */
> +
> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
> +                           int num, RegisterInfo *ri, uint32_t *data,
> +                           MemoryRegion *container, const MemoryRegionOps *ops,
> +                           bool debug_enabled);
> +
>  /* Define constants for a 32 bit register */
>  #define REG32(reg, addr)                                                  \
>      enum { A_ ## reg = (addr) };                                          \


--
Alex Bennée

On Tue, Feb 9, 2016 at 8:12 AM, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> Alistair Francis <alistair.francis@xilinx.com> writes:
>
>> From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
>>
>> Add a helper that will scan a static RegisterAccessInfo Array
>> and populate a container MemoryRegion with registers as defined.
>>
>> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>> ---
>> V3:
>>  - Fix typo
>> V2:
>>  - Use memory_region_add_subregion_no_print()
>>
>>  hw/core/register.c    | 29 +++++++++++++++++++++++++++++
>>  include/hw/register.h | 20 ++++++++++++++++++++
>>  2 files changed, 49 insertions(+)
>>
>> diff --git a/hw/core/register.c b/hw/core/register.c
>> index 939f398..4d7dd95 100644
>> --- a/hw/core/register.c
>> +++ b/hw/core/register.c
>> @@ -258,6 +258,35 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size)
>>      return register_read_memory(opaque, addr, size, false);
>>  }
>>
>> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
>> +                           int num, RegisterInfo *ri, uint32_t *data,
>> +                           MemoryRegion *container, const MemoryRegionOps *ops,
>> +                           bool debug_enabled)
>
> Are there going to be register_init_block8, 16 and 64 variants? Perhaps
> this should be a generic register_block function that takes the size and
> skip of the registers?

I think at some point there will be benefits in supporting different
size registers.

What do you mean size and skip?

>
>> +{
>> +    const char *debug_prefix = object_get_typename(OBJECT(owner));
>> +    int i;
>> +
>> +    for (i = 0; i < num; i++) {
>> +        int index = rae[i].decode.addr / 4;
>> +        RegisterInfo *r = &ri[index];
>> +
>> +        *r = (RegisterInfo) {
>> +            .data = &data[index],
>> +            .data_size = sizeof(uint32_t),
>> +            .access = &rae[i],
>> +            .debug = debug_enabled,
>> +            .prefix = debug_prefix,
>> +            .opaque = owner,
>> +        };
>> +        register_init(r);
>> +
>> +        memory_region_init_io(&r->mem, OBJECT(owner), ops, r, r->access->name,
>> +                              sizeof(uint32_t));
>> +        memory_region_add_subregion_no_print(container,
>> +                                             r->access->decode.addr,
>> &r->mem);
>
> Why a memory region for every register? Couldn't we have a shared region
> for the whole block and handle dispatching in the register code?

This is something else that Peter would know better. Looking at it I
don't see any reason that it couldn't be an array or RegisterInfo and
use that with one memory region. It would make the read/write logic
more complex though.

I would want a consensus to do it that way before I re-write it though.

Thanks,

Alistair

>
>> +    }
>> +}
>> +
>>  static const TypeInfo register_info = {
>>      .name  = TYPE_REGISTER,
>>      .parent = TYPE_DEVICE,
>> diff --git a/include/hw/register.h b/include/hw/register.h
>> index 3316458..30dedbf 100644
>> --- a/include/hw/register.h
>> +++ b/include/hw/register.h
>> @@ -182,6 +182,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value,
>>  uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size);
>>  uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size);
>>
>> +/**
>> + * Init a block of consecutive registers into a container MemoryRegion. A
>> + * number of constant register definitions are parsed to create a corresponding
>> + * array of RegisterInfo's.
>> + *
>> + * @owner: device owning the registers
>> + * @rae: Register definitions to init
>> + * @num: number of registers to init (length of @rae)
>> + * @ri: Register array to init
>> + * @data: Array to use for register data
>> + * @container: Memory region to contain new registers
>> + * @ops: Memory region ops to access registers.
>> + * @debug enabled: turn on/off verbose debug information
>> + */
>> +
>> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
>> +                           int num, RegisterInfo *ri, uint32_t *data,
>> +                           MemoryRegion *container, const MemoryRegionOps *ops,
>> +                           bool debug_enabled);
>> +
>>  /* Define constants for a 32 bit register */
>>  #define REG32(reg, addr)                                                  \
>>      enum { A_ ## reg = (addr) };                                          \
>
>
> --
> Alex Bennée
>