Documentation: minor correction of gpio dts example
diff mbox

Message ID 1453909091-16955-1-git-send-email-wr.phallsma@gmail.com
State New
Headers show

Commit Message

Per Hallsmark Jan. 27, 2016, 3:38 p.m. UTC
From: Per Hallsmark <per.hallsmark@windriver.com>

As the example brings up two ranges of 10 pins each, the count
should be 10 in both range definitions.

Signed-off-by: Per Hallsmark <per.hallsmark@windriver.com>
---
 Documentation/devicetree/bindings/gpio/gpio.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Alexandre Courbot Jan. 28, 2016, 1:15 a.m. UTC | #1
On Thu, Jan 28, 2016 at 12:38 AM,  <wr.phallsma@gmail.com> wrote:
> From: Per Hallsmark <per.hallsmark@windriver.com>
>
> As the example brings up two ranges of 10 pins each, the count
> should be 10 in both range definitions.
>
> Signed-off-by: Per Hallsmark <per.hallsmark@windriver.com>
> ---
>  Documentation/devicetree/bindings/gpio/gpio.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
> index 069cdf6..ad3d64b 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio.txt
> @@ -252,7 +252,7 @@ Example 1:
>                 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
>                 reg = <0x1460 0x18>;
>                 gpio-controller;
> -               gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
> +               gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 10>;

Looks correct wrt. the description that follows, thanks!

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>

One nit: please make sure to run scripts/get_maintainer.pl on your
patch and email the maintainers of the subsystem you are submitting to
directly. It usually makes your email more visible in their inboxes
than if you send to the mailing-list only.
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Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index 069cdf6..ad3d64b 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -252,7 +252,7 @@  Example 1:
 		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
 		reg = <0x1460 0x18>;
 		gpio-controller;
-		gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
+		gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 10>;
 	};
 
 Here, a single GPIO controller has GPIOs 0..9 routed to pin controller