diff mbox

[U-Boot,resend] nand: mxs: fix error handling for mxs_nand_init

Message ID 1453862282-10019-1-git-send-email-van.freenix@gmail.com
State Accepted
Delegated to: Scott Wood
Headers show

Commit Message

Peng Fan Jan. 27, 2016, 2:38 a.m. UTC 
Fix error handling for mxs_nand_init.

The original error handling is wrong for err2 and err1.
Should first free desc[x], then free desc.

This patch also correctly handle err3, should use
MXS_DMA_CHANNEL_AHB_APBH_GPMI0 as the check point.

Cc: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <Fabio.Estevam@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <van.freenix@gmail.com>
---
 drivers/mtd/nand/mxs_nand.c | 24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)

Comments

Marek Vasut Jan. 27, 2016, 3:10 a.m. UTC | #1 
On Wednesday, January 27, 2016 at 03:38:02 AM, Peng Fan wrote:
> Fix error handling for mxs_nand_init.
> 
> The original error handling is wrong for err2 and err1.
> Should first free desc[x], then free desc.
> 
> This patch also correctly handle err3, should use
> MXS_DMA_CHANNEL_AHB_APBH_GPMI0 as the check point.
> 
> Cc: Stefano Babic <sbabic@denx.de>
> CC: Fabio Estevam <Fabio.Estevam@freescale.com>
> Cc: Scott Wood <scottwood@freescale.com>
> Cc: Marek Vasut <marex@denx.de>
> Signed-off-by: Peng Fan <van.freenix@gmail.com>

It looks fine,

Reviewed-by: Marek Vasut <marex@denx.de>

Why the resend btw ?

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index ba019a0..b5bbd88 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1090,24 +1090,29 @@  int mxs_nand_init(struct mxs_nand_info *info)
 		(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
 	struct mxs_bch_regs *bch_regs =
 		(struct mxs_bch_regs *)MXS_BCH_BASE;
-	int i = 0, j;
+	int i = 0, j, ret = 0;
 
 	info->desc = malloc(sizeof(struct mxs_dma_desc *) *
 				MXS_NAND_DMA_DESCRIPTOR_COUNT);
-	if (!info->desc)
+	if (!info->desc) {
+		ret = -ENOMEM;
 		goto err1;
+	}
 
 	/* Allocate the DMA descriptors. */
 	for (i = 0; i < MXS_NAND_DMA_DESCRIPTOR_COUNT; i++) {
 		info->desc[i] = mxs_dma_desc_alloc();
-		if (!info->desc[i])
+		if (!info->desc[i]) {
+			ret = -ENOMEM;
 			goto err2;
+		}
 	}
 
 	/* Init the DMA controller. */
 	for (j = MXS_DMA_CHANNEL_AHB_APBH_GPMI0;
 		j <= MXS_DMA_CHANNEL_AHB_APBH_GPMI7; j++) {
-		if (mxs_dma_init_channel(j))
+		ret = mxs_dma_init_channel(j);
+		if (ret)
 			goto err3;
 	}
 
@@ -1127,15 +1132,16 @@  int mxs_nand_init(struct mxs_nand_info *info)
 	return 0;
 
 err3:
-	for (--j; j >= 0; j--)
+	for (--j; j >= MXS_DMA_CHANNEL_AHB_APBH_GPMI0; j--)
 		mxs_dma_release(j);
 err2:
-	free(info->desc);
-err1:
 	for (--i; i >= 0; i--)
 		mxs_dma_desc_free(info->desc[i]);
-	printf("MXS NAND: Unable to allocate DMA descriptors\n");
-	return -ENOMEM;
+	free(info->desc);
+err1:
+	if (ret == -ENOMEM)
+		printf("MXS NAND: Unable to allocate DMA descriptors\n");
+	return ret;
 }
 
 /*!