| Message ID | 1453827558-10954-3-git-send-email-ralf@ramses-pyramidenbau.de |
|---|---|
| State | Accepted, archived |
| Headers | show |
On 01/26/2016 09:59 AM, Ralf Ramsauer wrote: > This patch enables the APB DMA high speed UARTs of the Jetson TK1. So > far, they were only enabled in NVidia's official BSP. > > Those additional UARTs are exposed on the expansion connector J3A2: > > UART1: > Pin 41: BR_UART1_TXD > Pin 44: BR_UART1_RXD > > UART2: > Pin 65: UART2_RXD > Pin 68: UART2_TXD > Pin 71: UART2_CTS_L > Pin 74: UART2_RTS_L The series, Acked-by: Stephen Warren <swarren@nvidia.com> As an aside, this is perfectly OK, but I wonder why you chose to use compatible=nvidia,tegra124-hsuart rather than compatible=nvidia,tegra124-uart. The -hsuart driver has had less testing upstream, whereas the regular -uart driver is heavily used for the main serial console. I assume you tested the new driver when enabling the ports:-) -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 01/26/16 20:27, Stephen Warren wrote: > On 01/26/2016 09:59 AM, Ralf Ramsauer wrote: >> This patch enables the APB DMA high speed UARTs of the Jetson TK1. So >> far, they were only enabled in NVidia's official BSP. >> >> Those additional UARTs are exposed on the expansion connector J3A2: >> >> UART1: >> Pin 41: BR_UART1_TXD >> Pin 44: BR_UART1_RXD >> >> UART2: >> Pin 65: UART2_RXD >> Pin 68: UART2_TXD >> Pin 71: UART2_CTS_L >> Pin 74: UART2_RTS_L > > The series, > Acked-by: Stephen Warren <swarren@nvidia.com> > > > As an aside, this is perfectly OK, but I wonder why you chose to use > compatible=nvidia,tegra124-hsuart rather than > compatible=nvidia,tegra124-uart. The -hsuart driver has had less > testing upstream, whereas the regular -uart driver is heavily used for > the main serial console. I assume you tested the new driver when > enabling the ports:-) Let me explain it, this is how I found the typos :-) tegra124.dtsi states: /* * There are two serial driver i.e. 8250 based simple serial * driver and APB DMA based serial driver for higher baudrate * and performace. To enable the 8250 based driver, the compatible * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable * the APB DMA based serial driver, the compatible is * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart". */ There's nothing written about the upstream stability of the hsuart driver. So I didn't even try to use the non-hs uart driver. Nevertheless I successfully tested both additional uarts using the hsuart driver against 4.5-rc1 and some uart-speaking device. Ralf
On Tue, Jan 26, 2016 at 05:59:18PM +0100, Ralf Ramsauer wrote: > This patch enables the APB DMA high speed UARTs of the Jetson TK1. So > far, they were only enabled in NVidia's official BSP. > > Those additional UARTs are exposed on the expansion connector J3A2: > > UART1: > Pin 41: BR_UART1_TXD > Pin 44: BR_UART1_RXD > > UART2: > Pin 65: UART2_RXD > Pin 68: UART2_TXD > Pin 71: UART2_CTS_L > Pin 74: UART2_RTS_L > > Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de> > --- > arch/arm/boot/dts/tegra124-jetson-tk1.dts | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) Applied, thanks. Thierry
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 66b4451..4ee2e63 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -12,7 +12,11 @@ aliases { rtc0 = "/i2c@0,7000d000/pmic@40"; rtc1 = "/rtc@0,7000e000"; + + /* This order keeps the mapping DB9 connector <-> ttyS0 */ serial0 = &uartd; + serial1 = &uarta; + serial2 = &uartb; }; memory { @@ -1367,6 +1371,28 @@ }; }; + /* + * First high speed UART, exposed on the expansion connector J3A2 + * Pin 41: BR_UART1_TXD + * Pin 44: BR_UART1_RXD + */ + serial@0,70006000 { + compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + /* + * Second high speed UART, exposed on the expansion connector J3A2 + * Pin 65: UART2_RXD + * Pin 68: UART2_TXD + * Pin 71: UART2_CTS_L + * Pin 74: UART2_RTS_L + */ + serial@0,70006040 { + compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart"; + status = "okay"; + }; + /* DB9 serial port */ serial@0,70006300 { status = "okay";
This patch enables the APB DMA high speed UARTs of the Jetson TK1. So far, they were only enabled in NVidia's official BSP. Those additional UARTs are exposed on the expansion connector J3A2: UART1: Pin 41: BR_UART1_TXD Pin 44: BR_UART1_RXD UART2: Pin 65: UART2_RXD Pin 68: UART2_TXD Pin 71: UART2_CTS_L Pin 74: UART2_RTS_L Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de> --- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)