From patchwork Sat Jun 26 21:04:54 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Botcazou X-Patchwork-Id: 57069 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id C6E13B6EF2 for ; Sun, 27 Jun 2010 07:09:20 +1000 (EST) Received: (qmail 27083 invoked by alias); 26 Jun 2010 21:09:19 -0000 Received: (qmail 27075 invoked by uid 22791); 26 Jun 2010 21:09:18 -0000 X-SWARE-Spam-Status: No, hits=-2.1 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from mel.act-europe.fr (HELO mel.act-europe.fr) (212.99.106.210) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 26 Jun 2010 21:09:13 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 62B9ECB0291 for ; Sat, 26 Jun 2010 23:09:21 +0200 (CEST) Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zUef5FXEw80v for ; Sat, 26 Jun 2010 23:09:21 +0200 (CEST) Received: from [192.168.1.2] (bon31-9-83-155-120-49.fbx.proxad.net [83.155.120.49]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mel.act-europe.fr (Postfix) with ESMTP id 3C968CB028D for ; Sat, 26 Jun 2010 23:09:21 +0200 (CEST) From: Eric Botcazou To: gcc-patches@gcc.gnu.org Subject: [SPARC] Make a couple of functions static Date: Sat, 26 Jun 2010 23:04:54 +0200 User-Agent: KMail/1.9.9 MIME-Version: 1.0 Message-Id: <201006262304.54674.ebotcazou@adacore.com> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Applied on the mainline. 2010-06-26 Eric Botcazou * config/sparc/sparc.c (sparc_emit_set_const32): Make static. (sparc_emit_set_const64): Likewise. Remove disabled code. * config/sparc/sparc-protos.h (sparc_emit_set_const32): Delete. (sparc_emit_set_const64): Likewise. Index: config/sparc/sparc-protos.h =================================================================== --- config/sparc/sparc-protos.h (revision 161426) +++ config/sparc/sparc-protos.h (working copy) @@ -66,8 +66,6 @@ extern bool legitimate_pic_operand_p (rt extern void sparc_emit_call_insn (rtx, rtx); extern void sparc_defer_case_vector (rtx, rtx, int); extern bool sparc_expand_move (enum machine_mode, rtx *); -extern void sparc_emit_set_const32 (rtx, rtx); -extern void sparc_emit_set_const64 (rtx, rtx); extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx); extern int sparc_splitdi_legitimate (rtx, rtx); extern int sparc_absnegfloat_split_legitimate (rtx, rtx); Index: config/sparc/sparc.c =================================================================== --- config/sparc/sparc.c (revision 161426) +++ config/sparc/sparc.c (working copy) @@ -354,6 +354,8 @@ static int function_arg_slotno (const CU static int supersparc_adjust_cost (rtx, rtx, rtx, int); static int hypersparc_adjust_cost (rtx, rtx, rtx, int); +static void sparc_emit_set_const32 (rtx, rtx); +static void sparc_emit_set_const64 (rtx, rtx); static void sparc_output_addr_vec (rtx); static void sparc_output_addr_diff_vec (rtx); static void sparc_output_deferred_case_vectors (void); @@ -1111,7 +1113,7 @@ sparc_expand_move (enum machine_mode mod We know it can't be done in one insn when we get here, the move expander guarantees this. */ -void +static void sparc_emit_set_const32 (rtx op0, rtx op1) { enum machine_mode mode = GET_MODE (op0); @@ -1353,7 +1355,7 @@ sparc_emit_set_symbolic_const64 (rtx op0 } #if HOST_BITS_PER_WIDE_INT == 32 -void +static void sparc_emit_set_const64 (rtx op0 ATTRIBUTE_UNUSED, rtx op1 ATTRIBUTE_UNUSED) { gcc_unreachable (); @@ -1710,7 +1712,7 @@ create_simple_focus_bits (unsigned HOST_ being loaded into a register. Emit the most efficient insn sequence possible. Detection of all the 1-insn cases has been done already. */ -void +static void sparc_emit_set_const64 (rtx op0, rtx op1) { unsigned HOST_WIDE_INT high_bits, low_bits; @@ -1936,10 +1938,6 @@ sparc_emit_set_const64 (rtx op0, rtx op1 } /* The easiest way when all else fails, is full decomposition. */ -#if 0 - printf ("sparc_emit_set_const64: Hard constant [%08lx%08lx] neg[%08lx%08lx]\n", - high_bits, low_bits, ~high_bits, ~low_bits); -#endif sparc_emit_set_const64_longway (op0, temp, high_bits, low_bits); } #endif /* HOST_BITS_PER_WIDE_INT == 32 */