diff mbox

[U-Boot,1/6] arm: omap: sata: move enable sata clocks to enable_basic_clocks()

Message ID 1453106863-18128-2-git-send-email-mugunthanvnm@ti.com
State Deferred
Delegated to: Tom Rini
Headers show

Commit Message

Mugunthan V N Jan. 18, 2016, 8:47 a.m. UTC 
All the clocks which has to be enabled has to be done in
enable_basic_clocks(), so moving enable sata clock to common
clocks enable function.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 arch/arm/cpu/armv7/omap-common/sata.c | 23 -----------------------
 arch/arm/cpu/armv7/omap5/hw_data.c    | 12 ++++++++++++
 2 files changed, 12 insertions(+), 23 deletions(-)

Comments

Tom Rini Jan. 19, 2016, 6:09 p.m. UTC | #1 
On Mon, Jan 18, 2016 at 02:17:38PM +0530, Mugunthan V N wrote:

> All the clocks which has to be enabled has to be done in
> enable_basic_clocks(), so moving enable sata clock to common
> clocks enable function.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/omap-common/sata.c b/arch/arm/cpu/armv7/omap-common/sata.c
index 2c2d1bc..0c82689 100644
--- a/arch/arm/cpu/armv7/omap-common/sata.c
+++ b/arch/arm/cpu/armv7/omap-common/sata.c
@@ -37,29 +37,6 @@  int init_sata(int dev)
 	int ret;
 	u32 val;
 
-	u32 const clk_domains_sata[] = {
-		0
-	};
-
-	u32 const clk_modules_hw_auto_sata[] = {
-		(*prcm)->cm_l3init_ocp2scp3_clkctrl,
-		0
-	};
-
-	u32 const clk_modules_explicit_en_sata[] = {
-		(*prcm)->cm_l3init_sata_clkctrl,
-		0
-	};
-
-	do_enable_clocks(clk_domains_sata,
-			 clk_modules_hw_auto_sata,
-			 clk_modules_explicit_en_sata,
-			 0);
-
-	/* Enable optional functional clock for SATA */
-	setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
-		     SATA_CLKCTRL_OPTFCLKEN_MASK);
-
 	sata_phy.power_reg = (void __iomem *)(*ctrl)->control_phy_power_sata;
 
 	/* Power up the PHY */
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 7f8c0a4..2e554bd 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -460,6 +460,9 @@  void enable_basic_clocks(void)
 		(*prcm)->cm_l4per_gpio6_clkctrl,
 		(*prcm)->cm_l4per_gpio7_clkctrl,
 		(*prcm)->cm_l4per_gpio8_clkctrl,
+#ifdef CONFIG_SCSI_AHCI_PLAT
+		(*prcm)->cm_l3init_ocp2scp3_clkctrl,
+#endif
 		0
 	};
 
@@ -478,6 +481,9 @@  void enable_basic_clocks(void)
 #ifdef CONFIG_TI_QSPI
 		(*prcm)->cm_l4per_qspi_clkctrl,
 #endif
+#ifdef CONFIG_SCSI_AHCI_PLAT
+		(*prcm)->cm_l3init_sata_clkctrl,
+#endif
 		0
 	};
 
@@ -510,6 +516,12 @@  void enable_basic_clocks(void)
 	setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24));
 #endif
 
+#ifdef CONFIG_SCSI_AHCI_PLAT
+	/* Enable optional functional clock for SATA */
+	setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
+		     SATA_CLKCTRL_OPTFCLKEN_MASK);
+#endif
+
 	/* Enable SCRM OPT clocks for PER and CORE dpll */
 	setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
 			OPTFCLKEN_SCRM_PER_MASK);