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[U-Boot,v2,44/55] x86: chromebook_link: Enable the syscon uclass

Message ID 1453072320-24298-45-git-send-email-sjg@chromium.org
State Accepted
Delegated to: Bin Meng
Headers show

Commit Message

Simon Glass Jan. 17, 2016, 11:11 p.m. UTC 
We will use a system controller to model the Intel Management Engine. Enable
this for link.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v2: None

 configs/chromebook_link_defconfig | 2 ++
 1 file changed, 2 insertions(+)

Comments

Bin Meng Jan. 21, 2016, 8:02 a.m. UTC | #1 
On Mon, Jan 18, 2016 at 7:11 AM, Simon Glass <sjg@chromium.org> wrote:
> We will use a system controller to model the Intel Management Engine. Enable
> this for link.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v2: None
>
>  configs/chromebook_link_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
>

applied to u-boot-x86/master, thanks!
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Patch

diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index daa958e..f44bef7 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -20,6 +20,8 @@  CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_TPM=y
 CONFIG_CMD_TPM_TEST=y
 CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
 CONFIG_CPU=y
 CONFIG_SYS_I2C_INTEL=y
 CONFIG_CMD_CROS_EC=y