diff mbox

[U-Boot,v4,4/8] dm: Expand the uclass for Platform Controller Hubs (PCH)

Message ID 1452987885-21970-5-git-send-email-sjg@chromium.org
State Accepted
Commit ca831f4933dc68d9ed1b6399cbda90068c520005
Delegated to: Simon Glass
Headers show

Commit Message

Simon Glass Jan. 16, 2016, 11:44 p.m. UTC
A Platform Controller Hub is an Intel concept - it is like the peripherals
on an SoC and is often in a separate chip from the CPU. The chip is typically
found on the first PCI bus and integrates multiple devices.

We have a very simple uclass to support PCHs. Add a few operations, such as
setting up the devices on the PCH and finding the SPI controller base
address. Also move it into drivers/pch/ since we will be adding a few PCH
drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

Changes in v4:
- Return -ENOSYS if the version is unknown

Changes in v3:
- Add a PCH method to enable/disable SPI flash protection
- Drop the pch_init() call

Changes in v2:
- Update the commit message and header file comments
- Use an enum for the PCH version
- Replace SBASE with SPI base
- Add a TODO to check if the init() method can be removed later

 arch/x86/lib/Makefile                      |  1 -
 drivers/Makefile                           |  1 +
 drivers/pch/Makefile                       |  5 ++
 {arch/x86/lib => drivers/pch}/pch-uclass.c | 32 +++++++++++++
 include/pch.h                              | 74 ++++++++++++++++++++++++++++++
 5 files changed, 112 insertions(+), 1 deletion(-)
 create mode 100644 drivers/pch/Makefile
 rename {arch/x86/lib => drivers/pch}/pch-uclass.c (50%)
 create mode 100644 include/pch.h

Comments

Bin Meng Jan. 18, 2016, 6:12 a.m. UTC | #1
On Sun, Jan 17, 2016 at 7:44 AM, Simon Glass <sjg@chromium.org> wrote:
> A Platform Controller Hub is an Intel concept - it is like the peripherals
> on an SoC and is often in a separate chip from the CPU. The chip is typically
> found on the first PCI bus and integrates multiple devices.
>
> We have a very simple uclass to support PCHs. Add a few operations, such as
> setting up the devices on the PCH and finding the SPI controller base
> address. Also move it into drivers/pch/ since we will be adding a few PCH
> drivers.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v4:
> - Return -ENOSYS if the version is unknown
>
> Changes in v3:
> - Add a PCH method to enable/disable SPI flash protection
> - Drop the pch_init() call
>
> Changes in v2:
> - Update the commit message and header file comments
> - Use an enum for the PCH version
> - Replace SBASE with SPI base
> - Add a TODO to check if the init() method can be removed later
>
>  arch/x86/lib/Makefile                      |  1 -
>  drivers/Makefile                           |  1 +
>  drivers/pch/Makefile                       |  5 ++
>  {arch/x86/lib => drivers/pch}/pch-uclass.c | 32 +++++++++++++
>  include/pch.h                              | 74 ++++++++++++++++++++++++++++++
>  5 files changed, 112 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/pch/Makefile
>  rename {arch/x86/lib => drivers/pch}/pch-uclass.c (50%)
>  create mode 100644 include/pch.h
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff mbox

Patch

diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index cd5ecb6..43792bc 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -24,7 +24,6 @@  obj-$(CONFIG_I8254_TIMER) += i8254.o
 ifndef CONFIG_DM_PCI
 obj-$(CONFIG_PCI) += pci_type1.o
 endif
-obj-y	+= pch-uclass.o
 obj-y	+= pirq_routing.o
 obj-y	+= relocate.o
 obj-y += physmem.o
diff --git a/drivers/Makefile b/drivers/Makefile
index 00da40b..6294048 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -51,6 +51,7 @@  obj-y += hwmon/
 obj-y += misc/
 obj-y += pcmcia/
 obj-y += dfu/
+obj-$(CONFIG_X86) += pch/
 obj-y += rtc/
 obj-y += sound/
 obj-y += timer/
diff --git a/drivers/pch/Makefile b/drivers/pch/Makefile
new file mode 100644
index 0000000..d69a99c
--- /dev/null
+++ b/drivers/pch/Makefile
@@ -0,0 +1,5 @@ 
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += pch-uclass.o
diff --git a/arch/x86/lib/pch-uclass.c b/drivers/pch/pch-uclass.c
similarity index 50%
rename from arch/x86/lib/pch-uclass.c
rename to drivers/pch/pch-uclass.c
index 20dfa81..4579ed1 100644
--- a/arch/x86/lib/pch-uclass.c
+++ b/drivers/pch/pch-uclass.c
@@ -7,10 +7,42 @@ 
 
 #include <common.h>
 #include <dm.h>
+#include <pch.h>
 #include <dm/root.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int pch_get_sbase(struct udevice *dev, ulong *sbasep)
+{
+	struct pch_ops *ops = pch_get_ops(dev);
+
+	*sbasep = 0;
+	if (!ops->get_sbase)
+		return -ENOSYS;
+
+	return ops->get_sbase(dev, sbasep);
+}
+
+enum pch_version pch_get_version(struct udevice *dev)
+{
+	struct pch_ops *ops = pch_get_ops(dev);
+
+	if (!ops->get_version)
+		return -ENOSYS;
+
+	return ops->get_version(dev);
+}
+
+int pch_set_spi_protect(struct udevice *dev, bool protect)
+{
+	struct pch_ops *ops = pch_get_ops(dev);
+
+	if (!ops->set_spi_protect)
+		return -ENOSYS;
+
+	return ops->set_spi_protect(dev, protect);
+}
+
 static int pch_uclass_post_bind(struct udevice *bus)
 {
 	/*
diff --git a/include/pch.h b/include/pch.h
new file mode 100644
index 0000000..ff26865
--- /dev/null
+++ b/include/pch.h
@@ -0,0 +1,74 @@ 
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __pch_h
+#define __pch_h
+
+enum pch_version {
+	PCHV_UNKNOWN,
+	PCHV_7,
+	PCHV_9,
+};
+
+/* Operations for the Platform Controller Hub */
+struct pch_ops {
+	/**
+	 * get_sbase() - get the address of SPI base
+	 *
+	 * @dev:	PCH device to check
+	 * @sbasep:	Returns address of SPI base if available, else 0
+	 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
+	 */
+	int (*get_sbase)(struct udevice *dev, ulong *sbasep);
+
+	/**
+	 * get_version() - get the PCH version
+	 *
+	 * @return version, or -ENOSYS if unknown
+	 */
+	enum pch_version (*get_version)(struct udevice *dev);
+
+	/**
+	 * set_spi_protect() - set whether SPI flash is protected or not
+	 *
+	 * @dev:	PCH device to adjust
+	 * @protect:	true to protect, false to unprotect
+	 *
+	 * @return 0 on success, -ENOSYS if not implemented
+	 */
+	int (*set_spi_protect)(struct udevice *dev, bool protect);
+};
+
+#define pch_get_ops(dev)        ((struct pch_ops *)(dev)->driver->ops)
+
+/**
+ * pch_get_sbase() - get the address of SPI base
+ *
+ * @dev:	PCH device to check
+ * @sbasep:	Returns address of SPI base if available, else 0
+ * @return 0 if OK, -ve on error (e.g. there is no SPI base)
+ */
+int pch_get_sbase(struct udevice *dev, ulong *sbasep);
+
+/**
+ * pch_get_version() - get the PCH version
+ *
+ * @return version, or -ENOSYS if unknown
+ */
+enum pch_version pch_get_version(struct udevice *dev);
+
+/**
+ * set_spi_protect() - set whether SPI flash is protected or not
+ *
+ * @dev:	PCH device to adjust
+ * @protect:	true to protect, false to unprotect
+ *
+ * @return 0 on success, -ENOSYS if not implemented
+ */
+int pch_set_spi_protect(struct udevice *dev, bool protect);
+
+#endif