@@ -297,7 +297,7 @@ int cpu_mmc_init(bd_t *bis)
int cpu_eth_init(bd_t *bis)
{
-#ifdef CONFIG_TSEC_ENET
+#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
tsec_standard_init(bis);
#endif
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/io.h>
@@ -22,7 +23,11 @@ DECLARE_GLOBAL_DATA_PTR;
void ft_fixup_enet_phy_connect_type(void *fdt)
{
+#ifndef CONFIG_DM_ETH
struct eth_device *dev;
+#else
+ struct udevice *dev;
+#endif
struct tsec_private *priv;
const char *enet_path, *phy_path;
char enet[16];
@@ -30,7 +35,12 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
int phy_node;
int i = 0;
uint32_t ph;
+#ifndef CONFIG_DM_ETH
char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" };
+#else
+ char *name[3] = { "ethernet@2d10000", "ethernet@2d50000",
+ "ethernet@2d90000" };
+#endif
for (; i < ARRAY_SIZE(name); i++) {
dev = eth_get_dev_by_name(name[i]);
@@ -57,6 +57,26 @@
};
};
+&enet0 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&sgmii_phy2>;
+ phy-connection-type = "sgmii";
+ status = "okay";
+};
+
+&enet1 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&sgmii_phy0>;
+ phy-connection-type = "sgmii";
+ status = "okay";
+};
+
+&enet2 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
};
@@ -352,13 +352,27 @@
};
mdio0: mdio@2d24000 {
- compatible = "gianfar";
- device_type = "mdio";
+ compatible = "fsl,tsec-mdio";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2d24000 0x4000>;
};
+ enet0: ethernet@2d10000 {
+ compatible = "fsl,tsec";
+ reg = <0x2d10000 0x1000>;
+ };
+
+ enet1: ethernet@2d50000 {
+ compatible = "fsl,tsec";
+ reg = <0x2d50000 0x1000>;
+ };
+
+ enet2: ethernet@2d90000 {
+ compatible = "fsl,tsec";
+ reg = <0x2d90000 0x1000>;
+ };
+
usb@8600000 {
compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
reg = <0x8600000 0x1000>;
@@ -245,7 +245,7 @@ int board_mmc_init(bd_t *bis)
int board_eth_init(bd_t *bis)
{
-#ifdef CONFIG_TSEC_ENET
+#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH)
struct fsl_pq_mdio_info mdio_info;
struct tsec_info_struct tsec_info[4];
int num = 0;
@@ -5,5 +5,5 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
-CONFIG_NETDEVICES=y
+CONFIG_DM_ETH=y
CONFIG_SYS_NS16550=y
@@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="LPUART"
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
-CONFIG_NETDEVICES=y
+CONFIG_DM_ETH=y
CONFIG_FSL_LPUART=y
@@ -348,6 +348,7 @@
#define CONFIG_TSEC_ENET
#ifdef CONFIG_TSEC_ENET
+#ifndef CONFIG_DM_ETH
#define CONFIG_MII
#define CONFIG_MII_DEFAULT_TSEC 1
#define CONFIG_TSEC1 1
@@ -370,6 +371,9 @@
#define TSEC3_PHYIDX 0
#define CONFIG_ETHPRIME "eTSEC1"
+#else
+#define CONFIG_ETHPRIME "ethernet@2d10000"
+#endif
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
Now that we have added driver model support to the TSEC driver, convert ls1021atwr board to use it. This depends on previous DM series for ls1021atwr: http://patchwork.ozlabs.org/patch/561855/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- arch/arm/cpu/armv7/ls102xa/cpu.c | 2 +- arch/arm/cpu/armv7/ls102xa/fdt.c | 10 ++++++++++ arch/arm/dts/ls1021a-twr.dts | 20 ++++++++++++++++++++ arch/arm/dts/ls1021a.dtsi | 18 ++++++++++++++++-- board/freescale/ls1021atwr/ls1021atwr.c | 2 +- configs/ls1021atwr_nor_defconfig | 2 +- configs/ls1021atwr_nor_lpuart_defconfig | 2 +- include/configs/ls1021atwr.h | 4 ++++ 8 files changed, 54 insertions(+), 6 deletions(-)