diff mbox

[ARM,AARCH64] target/PR68674: relayout vector_types in expand_expr

Message ID 568FB9AA.5020706@st.com
State New
Headers show

Commit Message

Christian Bruel Jan. 8, 2016, 1:29 p.m. UTC 
When compiling code with attribute targets on arm or aarch64, 
vector_type_mode returns different results (eg Vmode or BLKmode) 
depending on the current simd flags that are not set between functions.

for example the following code:

#include <arm_neon.h>

extern int8x8_t a;
extern int8x8_t b;

int16x8_t
__attribute__ ((target("fpu=neon")))
foo(void)
{
    return vaddl_s8 (a, b);
}

Triggers gcc_asserts in copy_to_mode_regs while expanding NEON builtins 
, because the mismatch and DECL_MODE current's TYPE_MODE used in 
expand_builtin for global variables.

but the best explanation is in the vector_type_mode:
/* Vector types need to re-check the target flags each time we report
     the machine mode.  We need to do this because attribute target can
     change the result of vector_mode_supported_p and have_regs_of_mode
     on a per-function basis.  Thus the TYPE_MODE of a VECTOR_TYPE can
     change on a per-function basis.  */

I first tried to hack the 2 machine descriptions to insert 
convert_to_mode or relayout_decls here and there, but I found this very 
fragile. Instead a more central relayout the of type while expanding 
gave good results, as proposed here.

bootstraped and tested with no regression for arm, aarch64 and i586.

Does this look to be the right approach ?

nb: for testing this patch is complementary with

https://gcc.gnu.org/ml/gcc-patches/2016-01/msg00332.html
https://gcc.gnu.org/ml/gcc-patches/2016-01/msg00248.html

thanks for your comments.

Comments

Christian Bruel Jan. 14, 2016, 1:09 p.m. UTC | #1 
https://gcc.gnu.org/ml/gcc-patches/2016-01/msg00415.html

thanks
diff mbox

Patch

2016-01-06  Christian Bruel  <christian.bruel@st.com>

	PR target/68674
	* expr.c (expand_expr_real_1): Relayout VECTOR_TYPE expression.

2016-01-06  Christian Bruel  <christian.bruel@st.com>

	PR target/68674
	* gcc.target/arm/pr68674.c
	* gcc.target/aarch64/pr68674.c

Index: gcc/expr.c
===================================================================
--- gcc/expr.c	(revision 232158)
+++ gcc/expr.c	(working copy)
@@ -9602,8 +9602,17 @@  expand_expr_real_1 (tree exp, rtx target
       exp = SSA_NAME_VAR (ssa_name);
       goto expand_decl_rtl;
 
-    case PARM_DECL:
     case VAR_DECL:
+      /* Vector types need to re-check the target flags,
+	 since DECL_MODE might change with attribute target.  */
+      if (TREE_CODE (type) == VECTOR_TYPE
+	  && DECL_MODE (exp) != TYPE_MODE (type)
+	  && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
+	relayout_decl (exp);
+
+      /* ... fall through ...  */
+
+    case PARM_DECL:
       /* If a static var's type was incomplete when the decl was written,
 	 but the type is complete now, lay out the decl now.  */
       if (DECL_SIZE (exp) == 0
Index: gcc/testsuite/gcc.target/arm/pr68674.c
===================================================================
--- gcc/testsuite/gcc.target/arm/pr68674.c	(revision 0)
+++ gcc/testsuite/gcc.target/arm/pr68674.c	(working copy)
@@ -0,0 +1,15 @@ 
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -mfloat-abi=softfp" } */
+
+#include <arm_neon.h>
+
+int8x8_t a, b;
+int16x8_t e;
+
+void
+__attribute__ ((target("fpu=neon")))
+foo(void)
+{
+  e = (int16x8_t) vaddl_s8(a, b);
+}
Index: gcc/testsuite/gcc.target/aarch64/pr68674.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/pr68674.c	(revision 0)
+++ gcc/testsuite/gcc.target/aarch64/pr68674.c	(working copy)
@@ -0,0 +1,15 @@ 
+/* { dg-do assemble } */
+/* { dg-options "-O2 -march=armv8-a+nosimd" } */
+
+#include <arm_neon.h>
+
+int8x8_t a, b;
+int16x8_t e;
+
+void
+__attribute__ ((target("+simd")))
+foo(void)
+{
+  e = (int16x8_t) vaddl_s8(a, b);
+}
+