[U-Boot,06/11] imx: imx-common: introduce boot auxiliary core
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Message ID DB5PR0401MB178137961A58D464566B64A9E4F60@DB5PR0401MB1781.eurprd04.prod.outlook.com
State Superseded
Delegated to: Stefano Babic
Headers show

Commit Message

Ye Li Jan. 8, 2016, 1:51 a.m. UTC
Hi Stefan,

On 1/7/2016 4:52 PM, Peng Fan wrote:

Hi Stefan,
On Wed, Jan 06, 2016 at 10:59:17PM -0800, Stefan Agner wrote:


On 2016-01-04 21:56, Peng Fan wrote:


From: Peng Fan <peng.fan@nxp.com><mailto:peng.fan@nxp.com>

To boot a auxiliary core in asymmetric multicore system, introduce the
new command "bootaux" to do it. Example of boot auxliary core from
0x70000000 where stores the boot head information that should be
parsed by auxiliary core, "bootaux 0x70000000".



This reminds me of a question which was nagging me lately:
Is the M4 core of SoloX/MX7 running a boot ROM? Or who/what is "parsing
the boot head information"?



There is no bootrom for m4 core. The bootimage for M4 contains stack
info and pc info. bootaux command will use the info extracted from bootimage.

See the following code:
"
int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
{
        struct src *src_reg;
        u32 stack, pc;

        if (!boot_private_data)
                return 1;

        stack = *(u32 *)boot_private_data;
        pc = *(u32 *)(boot_private_data + 4);

        /* Set the stack and pc to M4 bootROM */
        writel(stack, M4_BOOTROM_BASE_ADDR);
        writel(pc, M4_BOOTROM_BASE_ADDR + 4);

        /* Enable M4 */
        src_reg = (struct src *)SRC_BASE_ADDR;
        setbits_le32(&src_reg->scr, 0x00400000);
        clrbits_le32(&src_reg->scr, 0x00000010);

        return 0;
}

"


Per the cortex-M reference manual, the reset vector of M4 needs to exist at 0x0 (TCMUL). The PC and SP are the first two addresses of that vector.  So to boot M4, the A core must build the M4's reset vector with getting the PC and SP from image and filling them to TCMUL. When M4 is kicked, it will load the PC and SP by itself. Freescale uses a back door (M4_BOOTROM_BASE_ADDR) at A core side for accessing the M4 TCMUL.









Introduce Kconfig option IMX_BOOTAUX.

Signed-off-by: Ye.Li <ye.li@nxp.com><mailto:ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com><mailto:peng.fan@nxp.com>
---
 arch/arm/imx-common/Kconfig       |  6 ++++
 arch/arm/imx-common/Makefile      |  1 +
 arch/arm/imx-common/imx_bootaux.c | 59 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 66 insertions(+)
 create mode 100644 arch/arm/imx-common/imx_bootaux.c


What kind of image are supported by the bootaux command? Afaik, this is
some special/binary only format right?



Yeah. I just got the image from our rtos team, I do not have detail
info about the format.


bootaux command is designed to image independent. Only a image address is used as a parameter to this command but we don't define the image format. It is the arch/machine layer responsibility to determine and parse the format of the image which they want to support.
In 6SX and 7D arch implementation, we use a M4 image generated by Freescale MQX tool.  This binary file has M4 reset vector ahead of code.







Probably another discussion, but before polluting the command namespace:
Is that what we generally want?



Hmm, bootaux invokes
arch_auxiliary_core_check_up
arch_auxiliary_core_u

And arch code takes the responsibility to implement these two functions.

We try to make this common, but not sure whether this is ok for other SoCs.
So I move the command to arch/arm/imx-common

That's also the question from us. Any plan in u-boot to support heterogeneous cores? We hope this patch can bring some valuable opinions.




Thanks,
Peng.




--
Stefan



+       ""
+);





Best regards,
Ye Li

Patch
diff mbox

diff --git a/arch/arm/imx-common/Kconfig b/arch/arm/imx-common/Kconfig
index c4f48bb..1b7da5a 100644
--- a/arch/arm/imx-common/Kconfig
+++ b/arch/arm/imx-common/Kconfig
@@ -11,3 +11,9 @@  config IMX_RDC
          i.MX Resource domain controller is used to assign masters
          and peripherals to differet domains. This can be used to
          isolate resources.
+
+config IMX_BOOTAUX
+       bool "Support boot auxiliary core"
+       depends on ARCH_MX7 || ARCH_MX6
+       help
+         bootaux [addr] to boot auxiliary core.
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 568f41c..30e66ba 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -28,6 +28,7 @@  obj-y         += cache.o init.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o
 obj-$(CONFIG_IMX_RDC) += rdc-sema.o
+obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o
 obj-$(CONFIG_SECURE_BOOT)    += hab.o
 endif
 ifeq ($(SOC),$(filter $(SOC),vf610))
diff --git a/arch/arm/imx-common/imx_bootaux.c
b/arch/arm/imx-common/imx_bootaux.c
new file mode 100644
index 0000000..da424a7
--- /dev/null
+++ b/arch/arm/imx-common/imx_bootaux.c
@@ -0,0 +1,59 @@ 
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+
+/* Allow for arch specific config before we boot */
+static int __arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
+{
+       /* please define platform specific arch_auxiliary_core_up() */
+       return CMD_RET_FAILURE;
+}
+
+int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
+       __attribute__((weak, alias("__arch_auxiliary_core_up")));
+
+/* Allow for arch specific config before we boot */
+static int __arch_auxiliary_core_check_up(u32 core_id)
+{
+       /* please define platform specific arch_auxiliary_core_check_up() */
+       return 0;
+}
+
+int arch_auxiliary_core_check_up(u32 core_id)
+       __attribute__((weak, alias("__arch_auxiliary_core_check_up")));
+
+int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+       ulong addr;
+       int ret, up;
+
+       if (argc < 2)
+               return CMD_RET_USAGE;
+
+       up = arch_auxiliary_core_check_up(0);
+       if (up) {
+               printf("## Auxiliary core is already up\n");
+               return CMD_RET_SUCCESS;
+       }
+
+       addr = simple_strtoul(argv[1], NULL, 16);
+
+       printf("## Starting auxiliary core at 0x%08lX ...\n", addr);
+
+       ret = arch_auxiliary_core_up(0, addr);
+       if (ret)
+               return CMD_RET_FAILURE;
+
+       return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+       bootaux, CONFIG_SYS_MAXARGS, 1, do_bootaux,
+       "Start auxiliary core",