| Message ID | 1451898103-21868-1-git-send-email-narmstrong@baylibre.com |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | David Miller |
| Headers | show |
Le 04/01/2016 10:01, Neil Armstrong a écrit : > On some platforms, the macb integration does not use the USRIO > register to configure the (R)MII port and clocks. > When the register is not implemented and the MACB error signal > is connected to the bus error, reading or writing to the USRIO > register can trigger some Imprecise External Aborts on ARM platforms. > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > drivers/net/ethernet/cadence/macb.c | 27 +++++++++++++++------------ > drivers/net/ethernet/cadence/macb.h | 1 + > 2 files changed, 16 insertions(+), 12 deletions(-) > > Nicolas, > I post only the first patch of the previous set posted here : > http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com > to hopefully make it into the 4.5 merge time, > I'll post the vendor prefix once this patch will hit mainline. Okay, but I don't see how you will activate this capability (or I lost track of it). So, before I can accept one solution, can you please repost the whole solution as a v4. Thanks. Bye, > > Regards, > Neil > > diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c > index 8b45bc9..fa53bc3 100644 > --- a/drivers/net/ethernet/cadence/macb.c > +++ b/drivers/net/ethernet/cadence/macb.c > @@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs, > regs_buff[10] = macb_tx_dma(&bp->queues[0], tail); > regs_buff[11] = macb_tx_dma(&bp->queues[0], head); > > - regs_buff[12] = macb_or_gem_readl(bp, USRIO); > + if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) > + regs_buff[12] = macb_or_gem_readl(bp, USRIO); > if (macb_is_gem(bp)) { > regs_buff[13] = gem_readl(bp, DMACFG); > } > @@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev) > dev->hw_features &= ~NETIF_F_SG; > dev->features = dev->hw_features; > > - val = 0; > - if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII) > - val = GEM_BIT(RGMII); > - else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && > - (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) > - val = MACB_BIT(RMII); > - else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) > - val = MACB_BIT(MII); > + if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) { > + val = 0; > + if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII) > + val = GEM_BIT(RGMII); > + else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && > + (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) > + val = MACB_BIT(RMII); > + else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) > + val = MACB_BIT(MII); > > - if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) > - val |= MACB_BIT(CLKEN); > + if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) > + val |= MACB_BIT(CLKEN); > > - macb_or_gem_writel(bp, USRIO, val); > + macb_or_gem_writel(bp, USRIO, val); > + } > > /* Set MII management clock divider */ > val = macb_mdc_clk_div(bp); > diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h > index 5c03e81..0d4ecfc 100644 > --- a/drivers/net/ethernet/cadence/macb.h > +++ b/drivers/net/ethernet/cadence/macb.h > @@ -400,6 +400,7 @@ > #define MACB_CAPS_USRIO_HAS_CLKEN 0x00000002 > #define MACB_CAPS_USRIO_DEFAULT_IS_MII 0x00000004 > #define MACB_CAPS_NO_GIGABIT_HALF 0x00000008 > +#define MACB_CAPS_USRIO_DISABLED 0x00000010 > #define MACB_CAPS_FIFO_MODE 0x10000000 > #define MACB_CAPS_GIGABIT_MODE_AVAILABLE 0x20000000 > #define MACB_CAPS_SG_DISABLED 0x40000000 >
The first patch introduces a new capability bit to disable usage of the USRIO register on platform not implementing it thus avoiding some external imprecise aborts on ARM based platforms. The two last patchs adds a new macb variant compatible name using the capability, the NPx name is temporary and must be fixed when the first patch hits mainline. Only the first patch should be merged right now until the compatible name is fixed. v1: http://lkml.kernel.org/r/1449485914-12883-1-git-send-email-narmstrong@baylibre.com v2: http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com v3: http://lkml.kernel.org/r/1451898103-21868-1-git-send-email-narmstrong@baylibre.com v4: as nicolas suggested, use a new macb config and a new product/vendor prefix Neil Armstrong (3): net: ethernet: cadence-macb: Add disabled usrio caps net: macb: Add NPx macb config using USRIO_DISABLED cap dt-bindings: net: macb: Add NPx macb variant Documentation/devicetree/bindings/net/macb.txt | 1 + drivers/net/ethernet/cadence/macb.c | 33 ++++++++++++++++---------- drivers/net/ethernet/cadence/macb.h | 1 + 3 files changed, 23 insertions(+), 12 deletions(-)
The first patch introduces a new capability bit to disable usage of the USRIO register on platform not implementing it thus avoiding some external imprecise aborts on ARM based platforms. The two last patchs adds a new macb variant compatible name using the capability, the NP4 SoC uses this particular hardware configuration. v1: http://lkml.kernel.org/r/1449485914-12883-1-git-send-email-narmstrong@baylibre.com v2: http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com v3: http://lkml.kernel.org/r/1451898103-21868-1-git-send-email-narmstrong@baylibre.com v4: http://lkml.kernel.org/r/1451900573-22657-1-git-send-email-narmstrong@baylibre.com v5: switch SoC name to non-generic NP4 name Neil Armstrong (3): net: ethernet: cadence-macb: Add disabled usrio caps net: macb: Add NP4 macb config using USRIO_DISABLED dt-bindings: net: macb: Add NP4 macb variant Documentation/devicetree/bindings/net/macb.txt | 1 + drivers/net/ethernet/cadence/macb.c | 33 ++++++++++++++++---------- drivers/net/ethernet/cadence/macb.h | 1 + 3 files changed, 23 insertions(+), 12 deletions(-)
From: Neil Armstrong <narmstrong@baylibre.com> Date: Tue, 5 Jan 2016 14:39:15 +0100 > The first patch introduces a new capability bit to disable usage of the > USRIO register on platform not implementing it thus avoiding some external > imprecise aborts on ARM based platforms. > The two last patchs adds a new macb variant compatible name using the > capability, the NP4 SoC uses this particular hardware configuration. > > v1: http://lkml.kernel.org/r/1449485914-12883-1-git-send-email-narmstrong@baylibre.com > v2: http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com > v3: http://lkml.kernel.org/r/1451898103-21868-1-git-send-email-narmstrong@baylibre.com > v4: http://lkml.kernel.org/r/1451900573-22657-1-git-send-email-narmstrong@baylibre.com > v5: switch SoC name to non-generic NP4 name Series applied to net-next, thanks.
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index 8b45bc9..fa53bc3 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs, regs_buff[10] = macb_tx_dma(&bp->queues[0], tail); regs_buff[11] = macb_tx_dma(&bp->queues[0], head); - regs_buff[12] = macb_or_gem_readl(bp, USRIO); + if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) + regs_buff[12] = macb_or_gem_readl(bp, USRIO); if (macb_is_gem(bp)) { regs_buff[13] = gem_readl(bp, DMACFG); } @@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev) dev->hw_features &= ~NETIF_F_SG; dev->features = dev->hw_features; - val = 0; - if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII) - val = GEM_BIT(RGMII); - else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && - (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) - val = MACB_BIT(RMII); - else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) - val = MACB_BIT(MII); + if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) { + val = 0; + if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII) + val = GEM_BIT(RGMII); + else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && + (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) + val = MACB_BIT(RMII); + else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII)) + val = MACB_BIT(MII); - if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) - val |= MACB_BIT(CLKEN); + if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) + val |= MACB_BIT(CLKEN); - macb_or_gem_writel(bp, USRIO, val); + macb_or_gem_writel(bp, USRIO, val); + } /* Set MII management clock divider */ val = macb_mdc_clk_div(bp); diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 5c03e81..0d4ecfc 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -400,6 +400,7 @@ #define MACB_CAPS_USRIO_HAS_CLKEN 0x00000002 #define MACB_CAPS_USRIO_DEFAULT_IS_MII 0x00000004 #define MACB_CAPS_NO_GIGABIT_HALF 0x00000008 +#define MACB_CAPS_USRIO_DISABLED 0x00000010 #define MACB_CAPS_FIFO_MODE 0x10000000 #define MACB_CAPS_GIGABIT_MODE_AVAILABLE 0x20000000 #define MACB_CAPS_SG_DISABLED 0x40000000
On some platforms, the macb integration does not use the USRIO register to configure the (R)MII port and clocks. When the register is not implemented and the MACB error signal is connected to the bus error, reading or writing to the USRIO register can trigger some Imprecise External Aborts on ARM platforms. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- drivers/net/ethernet/cadence/macb.c | 27 +++++++++++++++------------ drivers/net/ethernet/cadence/macb.h | 1 + 2 files changed, 16 insertions(+), 12 deletions(-) Nicolas, I post only the first patch of the previous set posted here : http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com to hopefully make it into the 4.5 merge time, I'll post the vendor prefix once this patch will hit mainline. Regards, Neil