| Message ID | 20151229084338.GC30297@msticlxl57.ims.intel.com |
|---|---|
| State | New |
| Headers | show |
On Tue, Dec 29, 2015 at 9:43 AM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote: > Hi Jakub, > On 28 Dec 14:52, Jakub Jelinek wrote: >> On Mon, Dec 28, 2015 at 04:17:02PM +0300, Kirill Yukhin wrote: >> > Hello, >> > On 02 Dec 20:00, Kirill Yukhin wrote: >> > > Hello, >> > > On 30 Nov 13:46, Kirill Yukhin wrote: >> > > > Hello, >> > > > Patch in the bottom splits masked version of vec_extract_hi_<mode> >> > > > to block AVX-1512VL insn generation for KNL and cures ICE on spec2k6/450.soplex. >> > > > >> > > > Bootstrapped and regtesed. >> > > > >> > > > If no objections - I'll commit on Wednesday. >> > > > >> > > > gcc/ >> > > > * config/i386/sse.md (define_insn "vec_extract_hi_<mode>_maskm"): >> > > > Remove "prefix_extra". >> > > > (define_insn "vec_extract_hi_<mode>_mask"): New. >> > > > (define_insn "vec_extract_hi_<mode>"): Remove masking. >> > > > gcc/testsuite/ >> > > > * gcc.target/i386/avx512vl-vextractf32x4-1.c: Fix scan pattern. >> > Similar patch is needed to make spec2k6/465.tonto working for gcc-5. >> > Is patch in the bottom ok for gcc-5-branch if bootstrapped and regtested? >> > It cures spec2k6/465.tonto illegal insn emit. >> >> Can you add a runtime testcase that would fail without the patch and succeed >> with it? Perhaps add some asms etc. to force the operands to look similarly >> for RA purposes. The patch is ok with or without that testcase, though the >> testcase would be greatly appreciated. > I've prepared a testcase which fails to assemble w/o patch and passes when > it is applied. > > If no more objections - I'll commit changes tomorrow. > > gcc/testsuite/ > * gcc.target/i386/avx-vextractf128-256-5.c: New test. > > -- > Thanks, K >> >> Jakub > > commit 4bb1c06d563d995743b62a244511450cde93aa11 > Author: Kirill Yukhin <kirill.yukhin@intel.com> > Date: Tue Dec 29 11:42:55 2015 +0300 > > Fix 465.tonto. Add test. > > diff --git a/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-5.c b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-5.c > new file mode 100644 > index 0000000..6001856 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-5.c > @@ -0,0 +1,12 @@ > +/* { dg-require-effective-target avx512f } */ > +/* { dg-do assemble { target { ! { ia32 } } } } */ Please use { target { ! ia32 } } here. I will remove these extra braces from the i386 testcases soon. Uros.
diff --git a/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-5.c b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-5.c new file mode 100644 index 0000000..6001856 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-vextractf128-256-5.c @@ -0,0 +1,12 @@ +/* { dg-require-effective-target avx512f } */ +/* { dg-do assemble { target { ! { ia32 } } } } */ +/* { dg-options "-O2 -mavx512f" } */ + +#include <immintrin.h> + +register __m512d z asm ("zmm16"); /* { dg-warning "call-clobbered register used for global register variable" } */ + +__m128d foo () +{ + return _mm256_extractf128_pd (_mm512_extractf64x4_pd(z, 0), 1); +}