diff mbox

[U-Boot,V2,3/3] armv8/ls1043aqds: add QSPI boot support

Message ID 1450951919-27135-4-git-send-email-Qianyu.Gong@nxp.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

Gong Qianyu Dec. 24, 2015, 10:11 a.m. UTC 
From: Gong Qianyu <Qianyu.Gong@freescale.com>

Enable the U-Boot Driver Model(DM) to use the Freescale QSPI driver.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
---
V2:
 - No change.

 arch/arm/include/asm/arch-fsl-layerscape/cpu.h |  2 ++
 board/freescale/ls1043aqds/MAINTAINERS         |  1 +
 board/freescale/ls1043aqds/README              |  1 +
 board/freescale/ls1043aqds/ls1043aqds.c        |  7 +++++++
 configs/ls1043aqds_qspi_defconfig              |  9 +++++++++
 include/configs/ls1043a_common.h               |  6 +++---
 include/configs/ls1043aqds.h                   | 15 ++++++++++++---
 7 files changed, 35 insertions(+), 6 deletions(-)
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index e030430..f2f1206 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -150,6 +150,8 @@  static const struct sys_mmu_table early_mmu_table[] = {
 	{ CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE,
 	  CONFIG_SYS_FSL_DCSR_SIZE, MT_DEVICE_NGNRNE,
 	  PMD_SECT_NON_SHARE | PMD_SECT_PXN | PMD_SECT_UXN },
+	{ CONFIG_SYS_FSL_QSPI_BASE, CONFIG_SYS_FSL_QSPI_BASE,
+	  CONFIG_SYS_FSL_QSPI_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE },
 	{ CONFIG_SYS_FSL_IFC_BASE, CONFIG_SYS_FSL_IFC_BASE,
 	  CONFIG_SYS_FSL_IFC_SIZE, MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE },
 	{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
diff --git a/board/freescale/ls1043aqds/MAINTAINERS b/board/freescale/ls1043aqds/MAINTAINERS
index 868bb72..65a0af1 100644
--- a/board/freescale/ls1043aqds/MAINTAINERS
+++ b/board/freescale/ls1043aqds/MAINTAINERS
@@ -8,3 +8,4 @@  F:	configs/ls1043aqds_nor_ddr3_defconfig
 F:	configs/ls1043aqds_nand_defconfig
 F:	configs/ls1043aqds_sdcard_ifc_defconfig
 F:	configs/ls1043aqds_sdcard_qspi_defconfig
+F:	configs/ls1043aqds_qspi_defconfig
diff --git a/board/freescale/ls1043aqds/README b/board/freescale/ls1043aqds/README
index 6261a77..a6fd7a3 100644
--- a/board/freescale/ls1043aqds/README
+++ b/board/freescale/ls1043aqds/README
@@ -94,3 +94,4 @@  a) Promjet Boot
 b) NOR boot
 c) NAND boot
 d) SD boot
+e) QSPI boot
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index d6696ca..770b79f 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -43,15 +43,19 @@  enum {
 
 int checkboard(void)
 {
+#ifndef CONFIG_QSPI_BOOT
 	char buf[64];
 #ifndef CONFIG_SD_BOOT
 	u8 sw;
 #endif
+#endif
 
 	puts("Board: LS1043AQDS, boot from ");
 
 #ifdef CONFIG_SD_BOOT
 	puts("SD\n");
+#elif defined(CONFIG_QSPI_BOOT)
+	puts("QSPI\n");
 #else
 	sw = QIXIS_READ(brdcfg[0]);
 	sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
@@ -68,12 +72,15 @@  int checkboard(void)
 		printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
 #endif
 
+#ifndef CONFIG_QSPI_BOOT
+	/* For QSPI boot, here I2C is not ready yet. */
 	printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n",
 	       QIXIS_READ(id), QIXIS_READ(arch));
 
 	printf("FPGA:  v%d (%s), build %d\n",
 	       (int)QIXIS_READ(scver), qixis_read_tag(buf),
 	       (int)qixis_read_minor());
+#endif
 
 	return 0;
 }
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
new file mode 100644
index 0000000..fcbaf31
--- /dev/null
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -0,0 +1,9 @@ 
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043AQDS=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT"
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds"
+CONFIG_SYS_NS16550=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_DM_SPI=y
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 707405c..afddedc 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -121,7 +121,7 @@ 
 #endif
 
 /* IFC */
-#ifndef CONFIG_SD_BOOT_QSPI
+#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_FSL_IFC
 /*
  * CONFIG_SYS_FLASH_BASE has the final address (core view)
@@ -207,7 +207,7 @@ 
 #define CONFIG_SPI_FLASH_STMICRO	/* cs0 */
 #define CONFIG_SPI_FLASH_SST		/* cs1 */
 #define CONFIG_SPI_FLASH_EON		/* cs2 */
-#ifndef CONFIG_SD_BOOT_QSPI
+#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SF_DEFAULT_BUS		1
 #define CONFIG_SF_DEFAULT_CS		0
 #endif
@@ -218,7 +218,7 @@ 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_FM_MURAM_SIZE	0x60000
 
-#ifdef CONFIG_SD_BOOT_QSPI
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR		0x400d0000
 #define CONFIG_ENV_SPI_BUS		0
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index cb519e1..e01f06d 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -14,6 +14,8 @@ 
 
 #if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
 #define CONFIG_SYS_TEXT_BASE		0x82000000
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_SYS_TEXT_BASE		0x40010000
 #else
 #define CONFIG_SYS_TEXT_BASE		0x60100000
 #endif
@@ -112,7 +114,7 @@  unsigned long get_board_ddr_clk(void);
 /*
  * IFC Definitions
  */
-#ifndef CONFIG_SD_BOOT_QSPI
+#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_NOR0_CSPR_EXT	(0x0)
 #define CONFIG_SYS_NOR0_CSPR	(CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \
 				CSPR_PORT_SIZE_16 | \
@@ -204,7 +206,7 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(640 << 10)
 #endif
 
-#ifdef CONFIG_SD_BOOT_QSPI
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_QIXIS_I2C_ACCESS
 #define CONFIG_SYS_NO_FLASH
 #undef CONFIG_CMD_IMLS
@@ -227,8 +229,10 @@  unsigned long get_board_ddr_clk(void);
 #define QIXIS_LBMAP_NAND		0x09
 #define QIXIS_LBMAP_SD			0x00
 #define QIXIS_LBMAP_SD_QSPI		0xff
+#define QIXIS_LBMAP_QSPI		0xff
 #define QIXIS_RCW_SRC_NAND		0x106
 #define QIXIS_RCW_SRC_SD		0x040
+#define QIXIS_RCW_SRC_QSPI		0x045
 #define QIXIS_RST_CTL_RESET		0x41
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START	0x21
@@ -356,7 +360,7 @@  unsigned long get_board_ddr_clk(void);
 #define VDD_MV_MAX			1212
 
 /* QSPI device */
-#ifdef CONFIG_SD_BOOT_QSPI
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_FSL_QSPI
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_SPI_FLASH_SPANSION
@@ -415,6 +419,11 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_ENV_SIZE			0x2000
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE			0x2000          /* 8KB */
+#define CONFIG_ENV_OFFSET		0x100000        /* 1MB */
+#define CONFIG_ENV_SECT_SIZE		0x10000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + 0x200000)