| Message ID | 1450889708-2727-1-git-send-email-openwrt@kresin.me |
|---|---|
| State | Accepted |
| Headers | show |
diff --git a/target/linux/lantiq/dts/TDW89X0.dtsi b/target/linux/lantiq/dts/TDW89X0.dtsi index b2dbb21..734f618 100644 --- a/target/linux/lantiq/dts/TDW89X0.dtsi +++ b/target/linux/lantiq/dts/TDW89X0.dtsi @@ -27,12 +27,14 @@ interrupt-parent = <&icu0>; interrupts = <22 23 24>; #address-cells = <1>; + #size-cells = <1>; m25p80@0 { #address-cells = <1>; #size-cells = <1>; compatible = "jedec,spi-nor"; - reg = <3>; - spi-max-frequency = <20000000>; + reg = <3 0>; + spi-max-frequency = <33250000>; + m25p,fast-read; partition@0 { reg = <0x0 0x20000>;
Use the same max spi frequency as set in u-boot. According to the datasheets, the Q64-104HIP as well as the Winbond 25Q64FVSIG support spi frequencies up to 50 MHz. During my tests, the Q64-104HIP couldn't be recognized/initialized if the frequency was > 40MHz. Both chips do support fast read as well. While touching the dts file, I fixed the dtc compiler warnings. Signed-off-by: Mathias Kresin <openwrt@kresin.me> --- target/linux/lantiq/dts/TDW89X0.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)