From patchwork Thu Jun 17 11:03:12 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 56015 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 474F1B7D9B for ; Thu, 17 Jun 2010 21:18:58 +1000 (EST) Received: from localhost ([127.0.0.1]:51379 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OPD7W-0000Hl-FI for incoming@patchwork.ozlabs.org; Thu, 17 Jun 2010 07:18:54 -0400 Received: from [140.186.70.92] (port=37975 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OPCw4-00034w-DP for qemu-devel@nongnu.org; Thu, 17 Jun 2010 07:07:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OPCw2-0001Lk-G0 for qemu-devel@nongnu.org; Thu, 17 Jun 2010 07:07:04 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:46455) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OPCw1-0001L9-KJ for qemu-devel@nongnu.org; Thu, 17 Jun 2010 07:07:02 -0400 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id 8C2A81072C0; Thu, 17 Jun 2010 20:06:57 +0900 (JST) Received: (nullmailer pid 8743 invoked by uid 1000); Thu, 17 Jun 2010 11:03:16 -0000 From: Isaku Yamahata To: seabios@seabios.org Date: Thu, 17 Jun 2010 20:03:12 +0900 Message-Id: <6a5f5d169e64f0f9b5b395cc7bbdb184febf5630.1276771355.git.yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: stefano.stabellini@eu.citrix.com, jan.kiszka@siemens.com, mst@redhat.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, yamahata@valinux.co.jp, jean.guyader@gmail.com Subject: [Qemu-devel] [PATCH 4/8] seabios: pciinit: make pci bar assigner preferchable memory aware. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Make pci bar assigner preferchable memory aware. This is needed for PCI bridge support because memory space and prefetchable memory space is filtered independently based on memory base/limit and prefetchable memory base/limit of pci bridge. On bus 0, such a distinction isn't necessary so keep existing behavior by checking bus=0. Signed-off-by: Isaku Yamahata --- src/pciinit.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/src/pciinit.c b/src/pciinit.c index b635e44..b6ab157 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -16,6 +16,7 @@ static u32 pci_bios_io_addr; static u32 pci_bios_mem_addr; +static u32 pci_bios_prefmem_addr; /* host irqs corresponding to PCI irqs A-D */ static u8 pci_irqs[4] = { 10, 10, 11, 11 @@ -70,6 +71,12 @@ static int pci_bios_allocate_region(u16 bdf, int region_num) u32 size = (~(val & mask)) + 1; if (val & PCI_BASE_ADDRESS_SPACE_IO) paddr = &pci_bios_io_addr; + else if ((val & PCI_BASE_ADDRESS_MEM_PREFETCH) && + /* keep behaviour on bus = 0 */ + pci_bdf_to_bus(bdf) != 0 && + /* If pci_bios_prefmem_addr == 0, keep old behaviour */ + pci_bios_prefmem_addr != 0) + paddr = &pci_bios_prefmem_addr; else paddr = &pci_bios_mem_addr; *paddr = ALIGN(*paddr, size); @@ -221,6 +228,9 @@ pci_setup(void) pci_bios_io_addr = 0xc000; pci_bios_mem_addr = BUILD_PCIMEM_START; + /* pci_bios_mem_addr + */ + pci_bios_prefmem_addr = pci_bios_mem_addr + 0x08000000; + int bdf, max; foreachpci(bdf, max) { pci_bios_init_bridges(bdf);