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[U-Boot,3/7] ARM: uniphier: split ProXstream2 board data and change DDR frequency

Message ID 1450342067-24669-4-git-send-email-yamada.masahiro@socionext.com
State Accepted
Delegated to: Masahiro Yamada
Headers show

Commit Message

Masahiro Yamada Dec. 17, 2015, 8:47 a.m. UTC 
The DDR3 memory chips on ProXstream2 boards support up to 2133 MHz,
while only up to 1866MHz on PH1-LD6b boards.

Split the board data structure and change the DDR frequency of
ProXstream2 boards to 2133 MHz.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/mach-uniphier/boards.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)
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Patch

diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index f328143..d075a11 100644
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -74,8 +74,7 @@  static const struct uniphier_board_data ph1_pro5_data = {
 };
 #endif
 
-#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \
-	defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
+#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)
 static const struct uniphier_board_data proxstream2_data = {
 	.dram_ch0_base  = 0x80000000,
 	.dram_ch0_size  = 0x40000000,
@@ -86,6 +85,21 @@  static const struct uniphier_board_data proxstream2_data = {
 	.dram_ch2_base  = 0xe0000000,
 	.dram_ch2_size  = 0x20000000,
 	.dram_ch2_width = 16,
+	.dram_freq      = 2133,
+};
+#endif
+
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
+static const struct uniphier_board_data ph1_ld6b_data = {
+	.dram_ch0_base  = 0x80000000,
+	.dram_ch0_size  = 0x40000000,
+	.dram_ch0_width = 32,
+	.dram_ch1_base  = 0xc0000000,
+	.dram_ch1_size  = 0x20000000,
+	.dram_ch1_width = 32,
+	.dram_ch2_base  = 0xe0000000,
+	.dram_ch2_size  = 0x20000000,
+	.dram_ch2_width = 16,
 	.dram_freq      = 1866,
 };
 #endif
@@ -115,7 +129,7 @@  static const struct uniphier_board_id uniphier_boards[] = {
 	{ "socionext,proxstream2", &proxstream2_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
-	{ "socionext,ph1-ld6b", &proxstream2_data, },
+	{ "socionext,ph1-ld6b", &ph1_ld6b_data, },
 #endif
 };