Patchwork [PATCHv2] pass info about hpets to seabios.]

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Submitter Gleb Natapov
Date June 14, 2010, 8:29 a.m.
Message ID <20100614082928.GB21797@redhat.com>
Download mbox | patch
Permalink /patch/55489/
State New
Headers show

Comments

Gleb Natapov - June 14, 2010, 8:29 a.m.
Currently HPET ACPI table is created regardless of whether qemu actually
created hpet device. This may confuse some guests that don't check that
hpet is functional before using it. Solve this by passing info about
hpets in qemu to seabios via fw config interface. Additional benefit is
that seabios no longer uses hard coded hpet configuration. Proposed
interface supports up to 8 hpets. This is the number defined by hpet 
spec.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
--
			Gleb.
Anthony Liguori - June 14, 2010, 4:28 p.m.
On 06/14/2010 03:29 AM, Gleb Natapov wrote:
> Currently HPET ACPI table is created regardless of whether qemu actually
> created hpet device. This may confuse some guests that don't check that
> hpet is functional before using it. Solve this by passing info about
> hpets in qemu to seabios via fw config interface. Additional benefit is
> that seabios no longer uses hard coded hpet configuration. Proposed
> interface supports up to 8 hpets. This is the number defined by hpet
> spec.
>
> Signed-off-by: Gleb Natapov<gleb@redhat.com>
>    

Applied.  Thanks.

Please let me know when Kevin merges the SeaBIOS side of this and I'll 
update the binary in the tree.

Regards,

Anthony Liguori
> diff --git a/hw/hpet.c b/hw/hpet.c
> index 93fc399..704fed1 100644
> --- a/hw/hpet.c
> +++ b/hw/hpet.c
> @@ -71,8 +71,11 @@ typedef struct HPETState {
>       uint64_t config;            /* configuration */
>       uint64_t isr;               /* interrupt status reg */
>       uint64_t hpet_counter;      /* main counter */
> +    uint8_t  hpet_id;           /* instance id */
>   } HPETState;
>
> +struct hpet_fw_config hpet_cfg = {.count = ~0};
> +
>   static uint32_t hpet_in_legacy_mode(HPETState *s)
>   {
>       return s->config&  HPET_CFG_LEGACY;
> @@ -228,6 +231,7 @@ static int hpet_post_load(void *opaque, int version_id)
>       /* Push number of timers into capability returned via HPET_ID */
>       s->capability&= ~HPET_ID_NUM_TIM_MASK;
>       s->capability |= (s->num_timers - 1)<<  HPET_ID_NUM_TIM_SHIFT;
> +    hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability;
>
>       /* Derive HPET_MSI_SUPPORT from the capability of the first timer. */
>       s->flags&= ~(1<<  HPET_MSI_SUPPORT);
> @@ -661,6 +665,8 @@ static void hpet_reset(DeviceState *d)
>            */
>           hpet_pit_enable();
>       }
> +    hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability;
> +    hpet_cfg.hpet[s->hpet_id].address = sysbus_from_qdev(d)->mmio[0].addr;
>       count = 1;
>   }
>
> @@ -680,6 +686,16 @@ static int hpet_init(SysBusDevice *dev)
>       int i, iomemtype;
>       HPETTimer *timer;
>
> +    if (hpet_cfg.count == ~0) /* first instance */
> +        hpet_cfg.count = 0;
> +
> +    if (hpet_cfg.count == 8) {
> +        fprintf(stderr, "Only 8 instances of HPET is allowed\n");
> +        return -1;
> +    }
> +
> +    s->hpet_id = hpet_cfg.count++;
> +
>       for (i = 0; i<  HPET_NUM_IRQ_ROUTES; i++) {
>           sysbus_init_irq(dev,&s->irqs[i]);
>       }
> diff --git a/hw/hpet_emul.h b/hw/hpet_emul.h
> index d7bc102..8bf312a 100644
> --- a/hw/hpet_emul.h
> +++ b/hw/hpet_emul.h
> @@ -53,4 +53,19 @@
>   #define HPET_TN_INT_ROUTE_CAP_SHIFT 32
>   #define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U
>
> +struct hpet_fw_entry
> +{
> +    uint32_t event_timer_block_id;
> +    uint64_t address;
> +    uint16_t min_tick;
> +    uint8_t page_prot;
> +} __attribute__ ((packed));
> +
> +struct hpet_fw_config
> +{
> +    uint8_t count;
> +    struct hpet_fw_entry hpet[8];
> +} __attribute__ ((packed));
> +
> +extern struct hpet_fw_config hpet_cfg;
>   #endif
> diff --git a/hw/pc.c b/hw/pc.c
> index 1491129..d14d657 100644
> --- a/hw/pc.c
> +++ b/hw/pc.c
> @@ -61,6 +61,7 @@
>   #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
>   #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
>   #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
> +#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
>
>   #define E820_NR_ENTRIES		16
>
> @@ -484,6 +485,8 @@ static void *bochs_bios_init(void)
>       fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table,
>                        sizeof(struct e820_table));
>
> +    fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, (uint8_t *)&hpet_cfg,
> +                     sizeof(struct hpet_fw_config));
>       /* allocate memory for the NUMA channel: one (64bit) word for the number
>        * of nodes, one word for each VCPU->node and one word for each node to
>        * hold the amount of memory.
> --
> 			Gleb.
>
>
>

Patch

diff --git a/hw/hpet.c b/hw/hpet.c
index 93fc399..704fed1 100644
--- a/hw/hpet.c
+++ b/hw/hpet.c
@@ -71,8 +71,11 @@  typedef struct HPETState {
     uint64_t config;            /* configuration */
     uint64_t isr;               /* interrupt status reg */
     uint64_t hpet_counter;      /* main counter */
+    uint8_t  hpet_id;           /* instance id */
 } HPETState;
 
+struct hpet_fw_config hpet_cfg = {.count = ~0};
+
 static uint32_t hpet_in_legacy_mode(HPETState *s)
 {
     return s->config & HPET_CFG_LEGACY;
@@ -228,6 +231,7 @@  static int hpet_post_load(void *opaque, int version_id)
     /* Push number of timers into capability returned via HPET_ID */
     s->capability &= ~HPET_ID_NUM_TIM_MASK;
     s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT;
+    hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability;
 
     /* Derive HPET_MSI_SUPPORT from the capability of the first timer. */
     s->flags &= ~(1 << HPET_MSI_SUPPORT);
@@ -661,6 +665,8 @@  static void hpet_reset(DeviceState *d)
          */
         hpet_pit_enable();
     }
+    hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability;
+    hpet_cfg.hpet[s->hpet_id].address = sysbus_from_qdev(d)->mmio[0].addr;
     count = 1;
 }
 
@@ -680,6 +686,16 @@  static int hpet_init(SysBusDevice *dev)
     int i, iomemtype;
     HPETTimer *timer;
 
+    if (hpet_cfg.count == ~0) /* first instance */
+        hpet_cfg.count = 0;
+
+    if (hpet_cfg.count == 8) {
+        fprintf(stderr, "Only 8 instances of HPET is allowed\n");
+        return -1;
+    }
+
+    s->hpet_id = hpet_cfg.count++;
+
     for (i = 0; i < HPET_NUM_IRQ_ROUTES; i++) {
         sysbus_init_irq(dev, &s->irqs[i]);
     }
diff --git a/hw/hpet_emul.h b/hw/hpet_emul.h
index d7bc102..8bf312a 100644
--- a/hw/hpet_emul.h
+++ b/hw/hpet_emul.h
@@ -53,4 +53,19 @@ 
 #define HPET_TN_INT_ROUTE_CAP_SHIFT 32
 #define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U
 
+struct hpet_fw_entry
+{
+    uint32_t event_timer_block_id;
+    uint64_t address;
+    uint16_t min_tick;
+    uint8_t page_prot;
+} __attribute__ ((packed));
+
+struct hpet_fw_config
+{
+    uint8_t count;
+    struct hpet_fw_entry hpet[8];
+} __attribute__ ((packed));
+
+extern struct hpet_fw_config hpet_cfg;
 #endif
diff --git a/hw/pc.c b/hw/pc.c
index 1491129..d14d657 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -61,6 +61,7 @@ 
 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
+#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
 
 #define E820_NR_ENTRIES		16
 
@@ -484,6 +485,8 @@  static void *bochs_bios_init(void)
     fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table,
                      sizeof(struct e820_table));
 
+    fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, (uint8_t *)&hpet_cfg,
+                     sizeof(struct hpet_fw_config));
     /* allocate memory for the NUMA channel: one (64bit) word for the number
      * of nodes, one word for each VCPU->node and one word for each node to
      * hold the amount of memory.